LPC1837FET256,551 NXP Semiconductors, LPC1837FET256,551 Datasheet - Page 682

• Manufacturer Part Number: LPC1837FET256,551
• Description: Microcontrollers (MCU) 32BIT ARM CORTEX-M3 MCU 136KB SRAM
• Manufacturer: NXP Semiconductors
• Series: LPC18xxr

Specifications of LPC1837FET256,551

• Core: ARM Cortex M3
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 136K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-LBGA
• Lead Free Status / Rohs Status: Details
• Other names: 935293795551

NXP Semiconductors
<Document ID>
User manual
Fig 81. Quadrature Encoder Basic Operation
direction
position
PhA
PhB
27.7.1.2 Digital input filtering
27.7.2 Position capture
27.7.3 Velocity capture
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Table 604. Encoder direction
Figure 81
All three encoder inputs (PhA, PhB, and index) require digital filtering. The number of
sample clocks is user programmable from 1 to 4,294,967,295 (0xFFFF FFFF). In order for
a transition to be accepted, the input signal must remain in new state for the programmed
number of sample clocks.
The capture mode for the position integrator can be set to update the position counter on
every edge of the PhA signal or to update on every edge of both PhA and PhB. Updating
the position counter on every PhA and PhB provides more positional resolution at the cost
of less range in the positional counter.
The position integrator and velocity capture can be independently enabled. Alternatively,
the phase signals can be interpreted as a clock and direction signal as output by some
encoders.
The position counter is automatically reset on one of three conditions. Incrementing past
the maximum position value (MAXPOS) will reset the position counter to zero. If the reset
on index bit (RESPI) is set, sensing the index pulse for the first time will once reset the
position counter to zero after the next positional increase (calibrate). If the continuously
reset on index bit (CRESPI) is set, sensing the index pulse will continuously reset the
position counter to zero after the next positional increase (recalibrate).
The velocity capture has a programmable timer and a capture register. It counts the
number of phase edges (using the same configuration as for the position integrator) in a
given time period. When the velocity timer (TIME) overflows the contents of the velocity
counter (VEL) are transferred to the capture (CAP) register. The velocity counter is then
DIR bit
0
1
0
1
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-1
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shows how quadrature encoder signals equate to direction and count.
All information provided in this document is subject to legal disclaimers.
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Rev. 00.13 — 20 July 2011
Chapter 27: LPC18xx Quadrature Encoder Interface (QEI)
DIRINV bit
0
0
1
1
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-1
-1
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direction
forward
reverse
reverse
forward
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-1
UM10430
© NXP B.V. 2011. All rights reserved.
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