LPC1837FET256,551 NXP Semiconductors, LPC1837FET256,551 Datasheet - Page 180
LPC1837FET256,551
Manufacturer Part Number
LPC1837FET256,551
Description
Microcontrollers (MCU) 32BIT ARM CORTEX-M3 MCU 136KB SRAM
Manufacturer
NXP Semiconductors
Series
LPC18xxr
Datasheets
1.LPC1830FET256551.pdf
(87 pages)
2.LPC1810FET100551.pdf
(2 pages)
3.LPC1810FET100551.pdf
(1164 pages)
Specifications of LPC1837FET256,551
Core
ARM Cortex M3
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
150MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
Number Of I /o
80
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
136K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-LBGA
Lead Free Status / Rohs Status
Details
Other names
935293795551
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NXP Semiconductors
Table 107. Pin description
<Document ID>
User manual
Symbol
CLK0
CLK1
CLK2
CLK3
Debug pins
N5
T10
D14
P12
x
x
x
x
…continued
x
-
x
-
x
-
x
-
45
-
99
-
All information provided in this document is subject to legal disclaimers.
[5]
[5]
[5]
[5]
Rev. 00.13 — 20 July 2011
Reset
state
[2]
O; PU
O; PU
O; PU
O; PU
Type Description
O
O
-
-
I/O
O
I/O
I
O
O
-
-
-
O
-
O
O
O
-
-
I/O
O
O
I/O
O
O
-
-
-
O
-
I/O
EMC_CLK0 — SDRAM clock 0.
CLKOUT — Clock output pin.
R — Function reserved.
R — Function reserved.
SD_CLK — SD/MMC card clock.
EMC_CLK01 — SDRAM clock 0 and clock 1 combined.
SSP1_SCK — Serial clock for SSP1.
ENET_TX_CLK (ENET_REF_CLK) — Ethernet Transmit
Clock (MII interface) or Ethernet Reference Clock (RMII
interface).
EMC_CLK1 — SDRAM clock 1.
CLKOUT — Clock output pin.
R — Function reserved.
R — Function reserved.
R — Function reserved.
CGU_OUT0 — CGU spare clock output 0.
R — Function reserved.
I2S1_TX_MCLK — I2S1 transmit master clock.
EMC_CLK3 — SDRAM clock 3.
CLKOUT — Clock output pin.
R — Function reserved.
R — Function reserved.
SD_CLK — SD/MMC card clock.
EMC_CLK23 — SDRAM clock 2 and clock 3 combined.
I2S0_TX_MCLK — I2S transmit master clock.
I2S1_RX_SCK — Receive Clock. It is driven by the
master and received by the slave. Corresponds to the
signal SCK in the I
EMC_CLK2 — SDRAM clock 2.
CLKOUT — Clock output pin.
R — Function reserved.
R — Function reserved.
R — Function reserved.
CGU_OUT1 — CGU spare clock output 1.
R — Function reserved.
I2S1_RX_SCK — Receive Clock. It is driven by the
master and received by the slave. Corresponds to the
signal SCK in the I
Chapter 12: LPC18xx Pin configuration
2
2
S-bus specification.
S-bus specification.
UM10430
© NXP B.V. 2011. All rights reserved.
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