LPC1837FET256,551 NXP Semiconductors, LPC1837FET256,551 Datasheet - Page 87

• Manufacturer Part Number: LPC1837FET256,551
• Description: Microcontrollers (MCU) 32BIT ARM CORTEX-M3 MCU 136KB SRAM
• Manufacturer: NXP Semiconductors
• Series: LPC18xxr

Specifications of LPC1837FET256,551

• Core: ARM Cortex M3
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 136K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-LBGA
• Lead Free Status / Rohs Status: Details
• Other names: 935293795551

NXP Semiconductors
<Document ID>
User manual
9.6.13 Output stage 20 register
Table 68.
This register controls the clock output to the CLKOUT pin. All clock generator outputs can
be monitored through this pin.
Table 69.
Bit
28:24
31:29
Bit
0
10:1
11
23:12
Symbol
PD
-
AUTOBLOCK
-
Symbol
CLK_SEL
-
Output stage 4 to 19 control registers (OUTCLK_4_CTRL to OUTCLK_19_CTRL,
address 0x4005 006C to 0x4005 00A8) bit description
Output stage 20 control register (OUTCLK_20_CTRL, addresses 0x4005 00AC) bit
description
All information provided in this document is subject to legal disclaimers.
Rev. 00.13 — 20 July 2011
Value
0x00
0x01
0x02
0x03
0x04
0x06
0x08
0x09
0x0C
0x0D
0x0E
0x0F
0x10
Value
0
1
0
1
Description
Clock source selection. All other values are
reserved.
32 kHz oscillator
ENET_RX_CLK
ENET_TX_CLK
GP_CLKIN
Crystal oscillator
PLL0 (for audio)
PLL1
IDIVA
IDIVB
IDIVC
IDIVD
IDIVE
Reserved
IRC (default)
Description
Output stage power down
Output stage enabled (default)
power-down
Reserved
Block clock automatically during frequency
change
Autoblocking disabled
Autoblocking enabled
Reserved
Chapter 9: LPC18xx Clock Generation Unit (CGU)
…continued
UM10430
© NXP B.V. 2011. All rights reserved.
Reset
value
0
-
0
-
Reset
value
0x01
-
Access
R/W
-
R/W
-
Access
R/W
-
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