LPC1837FET256,551 NXP Semiconductors, LPC1837FET256,551 Datasheet - Page 844

• Manufacturer Part Number: LPC1837FET256,551
• Description: Microcontrollers (MCU) 32BIT ARM CORTEX-M3 MCU 136KB SRAM
• Manufacturer: NXP Semiconductors
• Series: LPC18xxr

Specifications of LPC1837FET256,551

• Core: ARM Cortex M3
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 136K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-LBGA
• Lead Free Status / Rohs Status: Details
• Other names: 935293795551

NXP Semiconductors
<Document ID>
User manual
36.7.3.2 Data Transfer between IFx Registers and the Message RAM
36.7.3.3 Transmission of messages between the shift registers in the CAN core and
36.7.3.4 Acceptance filtering of received messages
When the CPU initiates a data transfer between the IFx Registers and Message RAM, the
Message Handler sets the BUSY bit in the respective Command Register to ‘1’. After the
transfer has completed, the BUSY bit is set back to ‘0’.
The Command Mask Register specifies whether a complete Message Object or only parts
of it will be transferred. Due to the structure of the Message RAM it is not possible to write
single bits/bytes of one Message Object. Software must always write a complete Message
Object into the Message RAM. Therefore the data transfer from the IFx Registers to the
Message RAM requires a read-modify-write cycle:
the Message buffer
If the shift register of the CAN Core cell is ready for loading and if there is no data transfer
between the IFx Registers and Message RAM, the MSGVAL bits in the Message Valid
Register TXRQST bits in the Transmission Request Register are evaluated. The valid
Message Object with the highest priority pending transmission request is loaded into the
shift register by the Message Handler and the transmission is started. The Message
Object’s NEWDAT bit is reset.
After a successful transmission and if no new data was written to the Message Object
(NEWDAT = ‘0’) since the start of the transmission, the TXRQST bit will be reset. If TXIE
is set, INTPND will be set after a successful transmission. If the CAN controller has lost
the arbitration or if an error occurred during the transmission, the message will be
retransmitted as soon as the CAN bus is free again. If meanwhile the transmission of a
message with higher priority has been requested, the messages will be transmitted in the
order of their priority.
When the arbitration and control field (Identifier + IDE + RTR + DLC) of an incoming
message is completely shifted into the Rx/Tx Shift Register of the CAN Core, the
Message Handler state machine starts the scanning of the Message RAM for a matching
valid Message Object.
To scan the Message RAM for a matching Message Object, the Acceptance Filtering unit
is loaded with the arbitration bits from the CAN Core shift register. Then the arbitration and
mask fields (including MSGVAL, UMASK, NEWDAT, and EOB) of Message Object 1 are
loaded into the Acceptance Filtering unit and compared with the arbitration field from the
shift register. This is repeated with each following Message Object until a matching
Message Object is found or until the end of the Message RAM is reached.
1. Read the parts of the message object that are not to be changed from the message
2. Write the complete contents of the message buffer registers into the message object.
RAM using the command mask register.
– After the partial read of a Message Object, the Message Buffer Registers that are
– After the partial write of a Message Object, the Message Buffer Registers that are
not selected in the Command Mask Register will be left unchanged.
not selected in the Command Mask Register will set to the actual contents of the
selected Message Object.
All information provided in this document is subject to legal disclaimers.
Rev. 00.13 — 20 July 2011
Chapter 36: LPC18xx C_CAN
UM10430
© NXP B.V. 2011. All rights reserved.
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