LPC1837FET256,551 NXP Semiconductors, LPC1837FET256,551 Datasheet - Page 31

• Manufacturer Part Number: LPC1837FET256,551
• Description: Microcontrollers (MCU) 32BIT ARM CORTEX-M3 MCU 136KB SRAM
• Manufacturer: NXP Semiconductors
• Series: LPC18xxr

Specifications of LPC1837FET256,551

• Core: ARM Cortex M3
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 136K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-LBGA
• Lead Free Status / Rohs Status: Details
• Other names: 935293795551

NXP Semiconductors
<Document ID>
User manual
3.3.4.5 SPI boot mode
3.3.5 Boot process timimg
The boot uses SSP0 in SPI mode. The SPI clock is 18 MHz.
Figure 14
mode happens only if the boot mode is set accordingly (see boot modes
Table
The following paramters describe the timing of the boot process:
Table 10.
Parameter
t_a
t_b
t_c
Fig 14. SPI boot process
8).
details the boot-flow steps of the SPI flash boot mode. The execution of this
Boot process timing parameters
Description
Check boot selection pins
Initialize device
Copy image to embedded SRAM
If part is executing from external
flash with no copy
If the image is encrypted or must
be copied
All information provided in this document is subject to legal disclaimers.
Rev. 00.13 — 20 July 2011
see main boot flow
P3_3, P3_6..P3_8
Configuration
SSP0_SCK=
Setup clock
Setup Pin
18MHz
Value
< 1 s
250 s
< 0.3 s
< 1 s to 10000 s
depending on the size of the image and the
speed of the boot memory
Chapter 3: LPC18xx Boot ROM
UM10430
© NXP B.V. 2011. All rights reserved.
Table 7
and
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