UPD70F3740GC-UEU-AX Renesas Electronics America, UPD70F3740GC-UEU-AX Datasheet - Page 12

• Manufacturer Part Number: UPD70F3740GC-UEU-AX
• Description: MCU 32BIT V850ES/JX3 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3r

Specifications of UPD70F3740GC-UEU-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

CHAPTER 16 3-WIRE VARIABLE-LENGTH SERIAL I/O (CSIB).................................................... 484
CHAPTER 17 I
16.1
16.2
16.3
16.4
16.5
16.6
16.7
16.8
16.9
17.1
17.2
17.3
17.4
17.5
17.6
17.7
Mode Switching of CSIB and Other Serial Interfaces ....................................................... 484
16.1.1
16.1.2
Features................................................................................................................................. 485
Configuration ........................................................................................................................ 486
Registers ............................................................................................................................... 488
Interrupt Request Signals.................................................................................................... 495
Operation............................................................................................................................... 496
16.6.1
16.6.2
16.6.3
16.6.4
16.6.5
16.6.6
16.6.7
16.6.8
16.6.9
16.6.10 Continuous transfer mode (slave mode, transmission mode) ..................................................517
16.6.11 Continuous transfer mode (slave mode, reception mode)........................................................519
16.6.12 Continuous transfer mode (slave mode, transmission/reception mode)...................................522
16.6.13 Reception error ........................................................................................................................526
16.6.14 Clock timing .............................................................................................................................527
Output Pins ........................................................................................................................... 529
Baud Rate Generator............................................................................................................ 530
16.8.1
Cautions ................................................................................................................................ 532
Mode Switching of I
17.1.1
17.1.2
17.1.3
Features................................................................................................................................. 536
Configuration ........................................................................................................................ 537
Registers ............................................................................................................................... 541
I
17.5.1
I
17.6.1
17.6.2
17.6.3
17.6.4
17.6.5
17.6.6
17.6.7
I
17.7.1
17.7.2
17.7.3
2
2
2
C Bus Mode Functions....................................................................................................... 557
C Bus Definitions and Control Methods .......................................................................... 558
C Interrupt Request Signals (INTIICn) .............................................................................. 566
2
C BUS .......................................................................................................................... 533
CSIB4 and UARTA0 mode switching.......................................................................................484
CSIB0 and I
Single transfer mode (master mode, transmission mode)........................................................496
Single transfer mode (master mode, reception mode) .............................................................498
Single transfer mode (master mode, transmission/reception mode) ........................................500
Single transfer mode (slave mode, transmission mode) ..........................................................502
Single transfer mode (slave mode, reception mode)................................................................504
Single transfer mode (slave mode, transmission/reception mode)...........................................506
Continuous transfer mode (master mode, transmission mode)................................................508
Continuous transfer mode (master mode, reception mode) .....................................................510
Continuous transfer mode (master mode, transmission/reception mode) ................................513
Baud rate generation ...............................................................................................................531
UARTA2 and I
CSIB0 and I
UARTA1 and I
Pin configuration ......................................................................................................................557
Start condition ..........................................................................................................................558
Addresses................................................................................................................................559
Transfer direction specification ................................................................................................560
ACK .........................................................................................................................................561
Stop condition ..........................................................................................................................562
Wait state.................................................................................................................................563
Wait state cancellation method ................................................................................................565
Master device operation...........................................................................................................566
Slave device operation (when receiving slave address data (address match)) ........................569
Slave device operation (when receiving extension code).........................................................573
2
2
C01 mode switching ............................................................................................485
C01 mode switching ............................................................................................534
2
2
2
C Bus and Other Serial Interfaces ................................................... 533
C00 mode switching.........................................................................................533
C02 mode switching.........................................................................................535