UPD70F3740GC-UEU-AX Renesas Electronics America, UPD70F3740GC-UEU-AX Datasheet - Page 450

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UPD70F3740GC-UEU-AX

Manufacturer Part Number
UPD70F3740GC-UEU-AX
Description
MCU 32BIT V850ES/JX3 100-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3r
Datasheet

Specifications of UPD70F3740GC-UEU-AX

Core Processor
RISC
Core Size
32-Bit
Speed
32MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
84
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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V850ES/JG3
13.6 Cautions
R01UH0015EJ0300 Rev.3.00
Sep 30, 2010
(1) When A/D converter is not used
(2) Input range of ANI0 to ANI11 pins
(3) Countermeasures against noise
(4) Alternate I/O
When the A/D converter is not used, the power consumption can be reduced by clearing the ADA0M0.ADA0CE bit
to 0.
Input the voltage within the specified range to the ANI0 to ANI11 pins. If a voltage equal to or higher than AV
equal to or lower than AV
the conversion value of that channel is undefined, and the conversion value of the other channels may also be
affected.
To maintain the 10-bit resolution, the ANI0 to ANI11 pins must be effectively protected from noise. The influence of
noise increases as the output impedance of the analog input source becomes higher. To lower the noise,
connecting an external capacitor as shown in Figure 13-12 is recommended.
The analog input pins (ANI0 to ANI11) function alternately as port pins. When selecting one of the ANI0 to ANI11
pins to execute A/D conversion, do not execute an instruction to read an input port or write to an output port during
conversion as the conversion resolution may drop.
Also the conversion resolution may drop at the pins set as output port pins during A/D conversion if the output
current fluctuates due to the effect of the external circuit connected to the port pins.
If a digital pulse is applied to a pin adjacent to the pin whose input signal is being converted, the A/D conversion
value may not be as expected due to the influence of coupling noise. Therefore, do not apply a pulse to a pin
adjacent to the pin undergoing A/D conversion.
SS
(even within the range of the absolute maximum ratings) is input to any of these pins,
Figure 13-12. Processing of Analog Input Pin
Clamp with a diode with a low V
if noise equal to or higher than AV
to or lower than AV
V
AV
ANI0 to ANI11
AV
V
DD
SS
REF0
SS
SS
may be generated.
CHAPTER 13 A/D CONVERTER
F
(0.3 V or less)
REF0
or equal
Page 434 of 870
REF0
or

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