UPD70F3740GC-UEU-AX Renesas Electronics America, UPD70F3740GC-UEU-AX Datasheet - Page 361

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UPD70F3740GC-UEU-AX

Manufacturer Part Number
UPD70F3740GC-UEU-AX
Description
MCU 32BIT V850ES/JX3 100-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3r
Datasheet

Specifications of UPD70F3740GC-UEU-AX

Core Processor
RISC
Core Size
32-Bit
Speed
32MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
84
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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V850ES/JG3
R01UH0015EJ0300 Rev.3.00
Sep 30, 2010
To transfer data from the TQ0CCRm register to the CCRm buffer register, the TQ0CCR1 register must be
written.
To change both the cycle and active level of the PWM waveform at this time, first set the cycle to the TQ0CCR0
register, set the active level width to the TQ0CCR2 and TQ0CCR3 registers, and then set an active level width
to the TQ0CCR1 register.
To change only the active level width (duty factor) of PWM wave, first set the active level to the TQ0CCR2 and
TQ0CCR3 registers, and then set an active level to the TQ0CCR1 register.
To change only the active level width (duty factor) of the PWM waveform output by the TOQ01 pin, only the
TQ0CCR1 register has to be set.
To change only the active level width (duty factor) of the PWM waveform output by the TOQ02 and TOQ03 pins,
first set an active level width to the TQ0CCR2 and TQ0CCR3 registers, and then write the same value to the
TQ0CCR1 register.
After the TQ0CCR1 register is written, the value written to the TQ0CCRm register is transferred to the CCRm
buffer register in synchronization with the timing of clearing the 16-bit counter, and is used as a value to be
compared with the value of the 16-bit counter.
To change only the cycle of the PWM waveform, first set a cycle to the TQ0CCR0 register, and then write the
same value to the TQ0CCR1 register.
To write the TQ0CCR0 to TQ0CCR3 registers again after writing the TQ0CCR1 register once, do so after the
INTTQ0CC0 signal is generated. Otherwise, the value of the CCRm buffer register may become undefined
because the timing of transferring data from the TQ0CCRm register to the CCRm buffer register conflicts with
writing the TQ0CCRm register.
Remark
m = 0 to 3
CHAPTRER 8 16-BIT TIMER/EVENT COUNTER Q (TMQ)
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