UPD70F3740GC-UEU-AX Renesas Electronics America, UPD70F3740GC-UEU-AX Datasheet - Page 49

• Manufacturer Part Number: UPD70F3740GC-UEU-AX
• Description: MCU 32BIT V850ES/JX3 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3r

Specifications of UPD70F3740GC-UEU-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3
R01UH0015EJ0300 Rev.3.00
Sep 30, 2010
(6) Exception/debug trap status saving registers (DBPC and DBPSW)
(7) CALLT base pointer (CTBP)
DBPSW
DBPC and DBPSW are exception/debug trap status registers.
If an exception trap or debug trap occurs, the contents of the program counter (PC) are saved to DBPC, and those
of the program status word (PSW) are saved to DBPSW.
The contents to be saved to DBPC are the address of the instruction next to the one that is being executed when
an exception trap or debug trap occurs.
The current contents of the PSW are saved to DBPSW.
These registers can be read or written only during the interval between the execution of the DBTRAP instruction or
illegal opcode and the DBRET instruction.
Bits 31 to 26 of DBPC and bits 31 to 8 of DBPSW are reserved for future function expansion (fixed to 0).
The value of DBPC is restored to the PC and the value of DBPSW to the PSW by the DBRET instruction.
The CALLT base pointer (CTBP) is used to specify a table address or generate a target address (bit 0 is fixed to 0).
Bits 31 to 26 of this register are reserved for future function expansion (fixed to 0).
CTBP
DBPC
31
0
31
31
0
0
0
0
0
0 0 0 0
0 0 0 0
0 0 0 0
26 25
26 25
0
0
0 0 0 0
0
0
0 0 0 0
(Saved PC contents)
(Base address)
0
0
0 0 0 0
8 7
(Saved PSW
contents)
CHAPTER 3 CPU FUNCTION
0
0
0
0
(x: Undefined)
Default value
(x: Undefined)
(x: Undefined)
0xxxxxxxH
Default value
Default value
000000xxH
0xxxxxxxH
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