UPD70F3740GC-UEU-AX Renesas Electronics America, UPD70F3740GC-UEU-AX Datasheet - Page 70

• Manufacturer Part Number: UPD70F3740GC-UEU-AX
• Description: MCU 32BIT V850ES/JX3 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3r

Specifications of UPD70F3740GC-UEU-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3
R01UH0015EJ0300 Rev.3.00
Sep 30, 2010
Note Only during emulation
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Address
DMA trigger factor register 1
DMA trigger factor register 2
DMA trigger factor register 3
Power save mode register
Clock control register
Lock register
Processor clock control register
PLL control register
CPU operation clock status register
Clock monitor mode register
Reset source flag register
Low-voltage detection register
Low-voltage detection level select register
Internal RAM data status register
Prescaler mode register 0
Prescaler compare register 0
On-chip debug mode register
Peripheral emulation register 1
UARTA0 control register 0
UARTA0 control register 1
UARTA0 control register 2
UARTA0 option control register 0
UARTA0 status register
UARTA0 receive data register
UARTA0 transmit data register
UARTA1 control register 0
UARTA1 control register 1
UARTA1 control register 2
UARTA1 option control register 0
UARTA1 status register
UARTA1 receive data register
UARTA1 transmit data register
UARTA2 control register 0
UARTA2 control register 1
UARTA2 control register 2
UARTA2 option control register 0
UARTA2 status register
UARTA2 receive data register
UARTA2 transmit data register
External interrupt falling edge specification register 0
External interrupt falling edge specification register 3
Function Register Name
DTFR1
DTFR2
DTFR3
PSMR
CKC
LOCKR
PCC
PLLCTL
CCLS
CLM
RESF
LVIM
LVIS
RAMS
PRSM0
PRSCM0
OCDM
PEMU1
UA0CTL0
UA0CTL1
UA0CTL2
UA0OPT0
UA0STR
UA0RX
UA0TX
UA1CTL0
UA1CTL1
UA1CTL2
UA1OPT0
UA1STR
UA1RX
UA1TX
UA2CTL0
UA2CTL1
UA2CTL2
UA2OPT0
UA2STR
UA2RX
UA2TX
INTF0
INTF3
Symbol
Note
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R
R
CHAPTER 3 CPU FUNCTION
Manipulatable Bits
1
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
8
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
16
00H
00H
00H
00H
0AH
00H
03H
01H
00H
00H
00H
00H
00H
01H
00H
00H
01H
00H
10H
00H
FFH
14H
00H
FFH
FFH
10H
00H
FFH
14H
00H
FFH
FFH
10H
00H
FFH
14H
00H
FFH
FFH
00H
00H
Default Value
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