UPD70F3740GC-UEU-AX Renesas Electronics America, UPD70F3740GC-UEU-AX Datasheet - Page 18

• Manufacturer Part Number: UPD70F3740GC-UEU-AX
• Description: MCU 32BIT V850ES/JX3 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3r

Specifications of UPD70F3740GC-UEU-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3
R01UH0015EJ0300 Rev.3.00
Sep 30, 2010
Internal
memory
Memory
space
External bus interface
General-purpose register
Main clock (oscillation frequency)
Subclock (oscillation frequency)
Internal oscillator
Minimum instruction execution time
DSP function
I/O port
Timer
Real-time output port
A/D converter
D/A converter
Serial interface
DMA controller
Interrupt source
Power save function
Reset
DCU
Operating power supply voltage
Operating ambient temperature
Package
Note The figure in parentheses indicates the number of external interrupts that can release the STOP mode.
Part Number
Flash memory
RAM
Logical space
External memory area
Address bus: 22 bits
Data bus: 8/16 bits
Multiplex bus mode/separate bus mode
32 bits × 32 registers
Ceramic/crystal
(in PLL mode: f
in clock through mode: f
Crystal (f
f
31.25 ns (main clock (f
32 × 32 = 64: 125 to 156.25 ns (at 32 MHz)
32 × 32 + 32 = 32: 187.5 ns (at 32 MHz)
16 × 16 = 32: 31.25 to 62.5 ns (at 32 MHz)
16 × 16 + 32 = 32: 93.75 ns (at 32 MHz)
I/O: 84 (5 V tolerant/N-ch open-drain output selectable: 40)
16-bit timer/event counter P: 6 channels
16-bit timer/event counter Q: 1 channel
16-bit interval timer M:
Watch timer:
Watchdog timer :
6 bits × 1 channel
10-bit resolution × 12 channels
8-bit resolution × 2 channels
UART/CSI:
UART/I
CSI:
CSI/I
4 channels (transfer target: on-chip peripheral I/O, internal RAM, external memory)
External: 9 (9)
HALT/IDLE1/IDLE2/STOP/subclock/sub-IDLE mode
RESET pin input, watchdog timer 2 (WDT2), clock monitor (CLM), low-voltage detector (LVI)
Provided (RUN/break)
2.85 to 3.6 V
−40 to +85°C
100-pin plastic LQFP (fine pitch) (14 × 14 mm)
R
= 220 kHz (TYP.)
μ
PD70F3739
2
C bus:
384 KB
32 KB
2
C bus: 2 channels
Table 1-1. V850ES/JG3 Product List
XT
= 32.768 kHz)
Note
X
1 channel
3 channels
1 channel
, internal: 48
= 2.5 to 5 MHz (multiplied by 4) or f
XX
X
) = 32 MHz)
= 2.5 to 10 MHz)
μ
PD70F3740
512 KB
1 channel
1 channel
1 channel
40 KB
64 MB
16 MB
μ
X
PD70F3741
= 2.5 to 4 MHz (multiplied by 8),
768 KB
60 KB
CHAPTER 1 INTRODUCTION
μ
PD70F3742
1024 KB
60 KB
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