UPD70F3740GC-UEU-AX Renesas Electronics America, UPD70F3740GC-UEU-AX Datasheet - Page 351

• Manufacturer Part Number: UPD70F3740GC-UEU-AX
• Description: MCU 32BIT V850ES/JX3 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3r

Specifications of UPD70F3740GC-UEU-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3
R01UH0015EJ0300 Rev.3.00
Sep 30, 2010
(2) Operation timing in one-shot pulse output mode
External trigger input
(only when software
INTTQ0CC0 signal
INTTQ0CCk signal
TQ0CCR0 register
TQ0CCRk register
(a) Note on rewriting TQ0CCRm register
TOQ00 pin output
TOQ0k pin output
(TIQ00 pin input)
trigger is used)
16-bit counter
To change the set value of the TQ0CCRm register to a smaller value, stop counting once, and then change the
set value.
If the value of the TQ0CCR0 register is rewritten to a smaller value during counting, the 16-bit counter may
overflow.
When the TQ0CCR0 register is rewritten from D
> D
than D
and less than D
count value. The counter counts up to FFFFH and then counts up again from 0000H. When the count value
matches D
matches D
Therefore, the counter may output a pulse with a delay period or active period different from that of the one-
shot pulse that is originally expected.
Remark
TQ0CE bit
01
FFFFH
0000H
and D
k1
and less than D
k = 1 to 3
k1
01
k0
, the counter generates the INTTQ0CCk signal and asserts the TOQ0k pin. When the count value
, the counter generates the INTTQ0CC0 signal, deasserts the TOQ0k pin, and stops counting.
> D
00
, each set value is reflected as soon as the register has been rewritten and compared with the
k1
, if the TQ0CCRk register is rewritten when the count value of the 16-bit counter is greater
Delay
(D
k0
k0
)
Active level width
D
and if the TQ0CCR0 register is rewritten when the count value is greater than D
(D
k0
00
D
− D
k0
D
k0
D
00
+ 1)
00
CHAPTRER 8 16-BIT TIMER/EVENT COUNTER Q (TMQ)
(10000H + D
00
D
to D
k0
Delay
01
and the TQ0CCRk register from D
D
k1
00
)
Active level width
D
(D
k1
01
− D
D
k1
k1
D
+ 1)
01
D
01
Delay
(D
k1
Active level width
D
)
(D
k1
01
k0
− D
to D
Page 335 of 870
k1
D
+ 1)
k1
01
where D
00
01