UPD70F3740GC-UEU-AX Renesas Electronics America, UPD70F3740GC-UEU-AX Datasheet - Page 156

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UPD70F3740GC-UEU-AX

Manufacturer Part Number
UPD70F3740GC-UEU-AX
Description
MCU 32BIT V850ES/JX3 100-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3r
Datasheet

Specifications of UPD70F3740GC-UEU-AX

Core Processor
RISC
Core Size
32-Bit
Speed
32MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
84
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Price
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P90
P91
P92
P93
P94
P95
P96
Name
Notes 1. When setting pins A0 to A15 as the alternate function, set all 16 bits of the PMC9 register to FFFFH at once.
Pin
A0
KR6
TXDA1
SDA02
A1
KR7
RXDA1/
KR7
SCL02
A2
TIP41
TOP41
A3
TIP40
TOP40
A4
TIP31
TOP31
A5
TIP30
TOP30
A6
TIP21
TOP21
2. The RXDA1 and KR7 pins must not be used at the same time. When using the RXDA1 pin, do not use the KR7 pin. When using the KR7 pin, do not use the RXDA1 pin (it
Alternate Function
Name
Note 2
is recommended to set the PFC91 bit to 1 and clear the PFCE91 bit to 0).
Output
Input
Output
I/O
Output
Input
Input
I/O
Output
Input
Output
Output
Input
Output
Output
Input
Output
Output
Input
Output
Output
Input
Output
I/O
P90 = Setting not required
P90 = Setting not required
P90 = Setting not required
P90 = Setting not required
P91 = Setting not required
P91 = Setting not required
P91 = Setting not required
P91 = Setting not required
P92 = Setting not required
P92 = Setting not required
P92 = Setting not required
P93 = Setting not required
P93 = Setting not required
P93 = Setting not required
P94 = Setting not required
P94 = Setting not required
P94 = Setting not required
P95 = Setting not required
P95 = Setting not required
P95 = Setting not required
P96 = Setting not required
P96 = Setting not required
P96 = Setting not required
Pn Register
Pnx Bit of
PM90 = Setting not required
PM90 = Setting not required
PM90 = Setting not required
PM90 = Setting not required
PM91 = Setting not required
PM91 = Setting not required
PM91 = Setting not required
PM91 = Setting not required
PM92 = Setting not required
PM92 = Setting not required
PM92 = Setting not required
PM93 = Setting not required
PM93 = Setting not required
PM93 = Setting not required
PM94 = Setting not required
PM94 = Setting not required
PM94 = Setting not required
PM95 = Setting not required
PM95 = Setting not required
PM95 = Setting not required
PM96 = Setting not required
PM96 = Setting not required
PM96 = Setting not required
PMn Register
PMnx Bit of
Table 4-15. Using Port Pin as Alternate-Function Pin (4/7)
PMC90 = 1
PMC90 = 1
PMC90 = 1
PMC90 = 1
PMC91 = 1
PMC91 = 1
PMC91 = 1
PMC91 = 1
PMC92 = 1
PMC92 = 1
PMC92 = 1
PMC93 = 1
PMC93 = 1
PMC93 = 1
PMC94 = 1
PMC94 = 1
PMC94 = 1
PMC95 = 1
PMC95 = 1
PMC95 = 1
PMC96 = 1
PMC96 = 1
PMC96 = 1
PMCn Register
PMCnx Bit of
PFCE90 = 0
PFCE90 = 0
PFCE90 = 1
PFCE90 = 1
PFCE91 = 0
PFCE91 = 0
PFCE91 = 1
PFCE91 = 1
PFCE92 = 0
PFCE92 = 0
PFCE92 = 1
PFCE93 = 0
PFCE93 = 0
PFCE93 = 1
PFCE94 = 0
PFCE94 = 0
PFCE94 = 1
PFCE95 = 0
PFCE95 = 0
PFCE95 = 1
PFCE96 = 0
PFCE96 = 1
PFCE96 = 1
PFCEn Register
PFCEnx Bit of
PFC90 = 0
PFC90 = 1
PFC90 = 0
PFC90 = 1
PFC91 = 0
PFC91 = 1
PFC91 = 0
PFC91 = 1
PFC92 = 0
PFC92 = 1
PFC92 = 0
PFC93 = 0
PFC93 = 1
PFC93 = 0
PFC94 = 0
PFC94 = 1
PFC94 = 0
PFC95 = 0
PFC95 = 1
PFC95 = 0
PFC96 = 0
PFC96 = 0
PFC96 = 1
PFCn Register
PFCnx Bit of
Note 1
PF90 (PF9) = 1
Note 1
PF91 (PF9) = 1
Note 1
Note 1
Note 1
Note 1
Note 1
(Registers)
Other Bits

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