UPD70F3740GC-UEU-AX Renesas Electronics America, UPD70F3740GC-UEU-AX Datasheet - Page 263

• Manufacturer Part Number: UPD70F3740GC-UEU-AX
• Description: MCU 32BIT V850ES/JX3 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3r

Specifications of UPD70F3740GC-UEU-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3
R01UH0015EJ0300 Rev.3.00
Sep 30, 2010
(2) PWM output mode operation timing
(a) Changing pulse width during operation
To change the PWM waveform while the counter is operating, write the TPnCCR1 register last.
Rewrite the TPnCCRm register after writing the TPnCCR1 register after the INTTPnCC1 signal is detected.
To transfer data from the TPnCCRm register to the CCRm buffer register, the TPnCCR1 register must be
written.
To change both the cycle and active level of the PWM waveform at this time, first set the cycle to the TPnCCR0
register and then set the active level to the TPnCCR1 register.
To change only the cycle of the PWM waveform, first set the cycle to the TPnCCR0 register, and then write the
same value to the TPnCCR1 register.
To change only the active level width (duty factor) of the PWM waveform, only the TPnCCR1 register has to be
set.
After data is written to the TPnCCR1 register, the value written to the TPnCCRm register is transferred to the
CCRm buffer register in synchronization with clearing of the 16-bit counter, and is used as the value compared
with the 16-bit counter.
To write the TPnCCR0 or TPnCCR1 register again after writing the TPnCCR1 register once, do so after the
INTTPnCC0 signal is generated. Otherwise, the value of the CCRm buffer register may become undefined
because the timing of transferring data from the TPnCCRm register to the CCRm buffer register conflicts with
writing the TPnCCRm register.
Remark
CCR0 buffer register
CCR1 buffer register
INTTPnCC0 signal
TPnCCR0 register
TPnCCR1 register
TOPn1 pin output
16-bit counter
TPnCE bit
n = 0 to 5, m = 0, 1
FFFFH
0000H
D
10
D
D
00
00
D
10
CHAPTRER 7 16-BIT TIMER/EVENT COUNTER P (TMP)
D
D
D
10
10
D
00
00
D
10
D
00
D
D
11
01
D
01
D
11
D
D
D
11
01
11
D
01
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