UPD70F3740GC-UEU-AX Renesas Electronics America, UPD70F3740GC-UEU-AX Datasheet - Page 624

• Manufacturer Part Number: UPD70F3740GC-UEU-AX
• Description: MCU 32BIT V850ES/JX3 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3r

Specifications of UPD70F3740GC-UEU-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3
R01UH0015EJ0300 Rev.3.00
Sep 30, 2010
Note To cancel slave wait, write FFH to IICn or set WRELn.
Remark
WRELn
INTIICn
WRELn
INTIICn
ACKDn
MSTSn
ACKDn
MSTSn
WTIMn
ACKEn
WTIMn
ACKEn
Processing by master device
SDA0n
Transfer lines
SCL0n
Processing by slave device
STDn
SPDn
TRCn
STDn
SPDn
TRCn
SPTn
SPTn
STTn
STTn
IICn
IICn
n = 0 to 2
H
H
H
H
H
L
L
L
L
L
Receive
Transmit
(When 9-Clock Wait Is Selected for Both Master and Slave) (3/3)
IICn
D7
1
IICn
Figure 17-23. Example of Master to Slave Communication
Note
←
←
D6
2
data
FFH Note
D5
3
D4
4
D3
5
(c) Stop condition
D2
6
D1
7
D0
8
ACK
9
IICn
Note
condition
←
Stop
FFH Note
(when SPIEn = 1)
(when SPIEn = 1)
condition
Start
CHAPTER 17 I
AD6
IICn
1
←
AD5
2
address
Page 608 of 870
2
C BUS