UPD70F3740GC-UEU-AX Renesas Electronics America, UPD70F3740GC-UEU-AX Datasheet - Page 724

• Manufacturer Part Number: UPD70F3740GC-UEU-AX
• Description: MCU 32BIT V850ES/JX3 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3r

Specifications of UPD70F3740GC-UEU-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3
24.3 Registers
R01UH0015EJ0300 Rev.3.00
Sep 30, 2010
The low-voltage detector is controlled by the following registers.
• Low-voltage detection register (LVIM)
• Low-voltage detection level select register (LVIS)
• Internal RAM data status register (RAMS)
(1) Low-voltage detection register (LVIM)
The LVIM register is a special register. This can be written only in the special combination of the sequences (see
3.4.7 Special registers).
The LVIM register is used to enable or disable low-voltage detection, and to set the operation mode of the low-
voltage detector.
This register can be read or written in 8-bit or 1-bit units. However, the LVIF bit is read-only.
After reset: Note 1
LVIM
Notes 1. Reset by low-voltage detection: 82H
Cautions 1. When the LVION and LVIMD bits to 1, the low-voltage detector cannot be stopped
2. After the LVI operation has started (LVION bit = 1) or when INTLVI has occurred, confirm
LVIF
LVIMD
LVION
LVION
2. When the LVION bit is set to 1, the comparator in the LVI circuit starts operating.
3. Be sure to clear bits 6 to 2 to “0”.
<7>
Reset due to other source: 00H
the supply voltage state using the LVIF bit.
0
1
0
1
0
1
Note 2
until the reset request due to other than the low-voltage detection is generated.
Wait 0.2 ms or longer by software before checking the voltage at the LVIF bit after
the LVION bit is set.
Disable operation.
Enable operation.
Generates interrupt request signal INTLVI when the supply voltage drops or rises
across the detection voltage value.
Generate internal reset signal LVIRES when the supply voltage drops across the
detected voltage value.
When supply voltage > detected voltage, or when operation is disabled
Supply voltage of connected power supply < detected voltage
R/W
6
0
Address: FFFFF890H
Selection of operation mode of low-voltage detection
Low-voltage detection operation enable or disable
5
0
Low-voltage detection flag
4
0
CHAPTER 24 LOW-VOLTAGE DETECTOR (LVI)
3
0
2
0
LVIMD
<1>
LVIF
<0>
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