UPD70F3740GC-UEU-AX Renesas Electronics America, UPD70F3740GC-UEU-AX Datasheet - Page 725

• Manufacturer Part Number: UPD70F3740GC-UEU-AX
• Description: MCU 32BIT V850ES/JX3 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3r

Specifications of UPD70F3740GC-UEU-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3
R01UH0015EJ0300 Rev.3.00
Sep 30, 2010
(2) Low-voltage detection level select register (LVIS)
(3) Internal RAM data status register (RAMS)
The LVIS register is used to select the level of low voltage to be detected.
This register can be read or written in 8-bit or 1-bit units.
The RAMS register is a special register. This can be written only in a special combination of sequences (see 3.4.7
Special registers).
This register is a flag register that indicates whether the internal RAM is valid or not.
This register can be read or written in 8-bit or 1-bit units.
The set/clear conditions for the RAMF bit are shown below.
• Setting conditions: Detection of voltage lower than specified level
• Clearing condition: Writing of 0 in specific sequence
RAMS
After reset: 01H
LVIS
After reset: Note
Note Reset by low-voltage detection: Retained
Cautions 1. This register cannot be written until a reset request due to something other than
Note This register is reset only when a voltage drop below the RAM retention voltage is detected.
Reset due to other source: 00H
RAMF
LVIS0
2. Be sure to clear bits 7 to 1 to “0”.
7
0
0
1
7
0
0
1
Note
low-voltage detection is generated after the LVIM.LVION and LVIM.LVIMD bits are
set to 1.
Set by instruction
2.95 V (TYP.) ±0.10 V
Reserved (setting prohibited)
Voltage lower than RAM retention voltage is not detected.
Voltage lower than RAM retention voltage is detected.
R/W
R/W
6
0
6
0
Address: FFFFF891H
Address: FFFFF892H
5
0
5
0
Internal RAM voltage detection
4
0
4
0
Detection level
CHAPTER 24 LOW-VOLTAGE DETECTOR (LVI)
3
0
3
0
2
0
2
0
1
0
1
0
RAMF
LVIS0
<0>
0
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