UPD70F3740GC-UEU-AX Renesas Electronics America, UPD70F3740GC-UEU-AX Datasheet - Page 886

• Manufacturer Part Number: UPD70F3740GC-UEU-AX
• Description: MCU 32BIT V850ES/JX3 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3r

Specifications of UPD70F3740GC-UEU-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3
F.1
F.2
A history of the revisions up to this edition is shown below. “Applied to:” indicates the chapters to which the revision was
applied.
R01UH0015EJ0300 Rev.3.00
Sep 30, 2010
2nd
p. 474
p. 474
p. 798
p. 799
Edition
Major Revisions in This Edition
Revision History of Previous Editions
Page
• Change of under development state of all products → Development completed
Modification of Figure 7-18 Register Setting for Operation in External Trigger Pulse Output Mode
Modification of Figure 7-22 Register Setting for Operation in One-Shot Pulse Output Mode
Modification of Figure 7-36 Register Setting in Pulse Width Measurement Mode
Modification of Figure 8-18 Register Setting for Operation in External Trigger Pulse Output Mode
Modification of Figure 8-22 Register Setting for Operation in One-Shot Pulse Output Mode
Modification of Figure 8-36 Register Setting in Pulse Width Measurement Mode
Modification of Table 13-2 Conversion Time Selection in Normal Conversion Mode (ADA0HS1 Bit
= 0)
Modification of Table 13-3 Conversion Time Selection in High-Speed Conversion Mode (ADA0HS1
Bit = 1)
Modification of Figure 13-3 Conversion Operation Timing (Continuous Conversion)
Modification of Figure 15-4 Block Diagram of Asynchronous Serial Interface An
Modification of 18.13 (4) (a) Temporarily stop transfer of all DMA channels
Modification of 18.13 (8) Bus arbitration for CPU
Modification of Table 27-2 Basic Functions
Modification of Table 27-3 Security Functions
Modification of Table 27-4 Security Setting
Modification of Figure 27-7 Procedure for Manipulating Flash Memory
Modification of Table 27-7 Flash Memory Control Commands
Modification of Figure 27-17 Standard Self Programming Flow
Modification of Table 27-10 Flash Function List
Modification of Table 27-11 Internal Resources Used
Addition of CHAPTER 29 (i) KYOCERA KINSEKI CORPORATION: Crystal resonator (T
+70°C)
Addition of CHAPTER 29 (ii) Murata Mfg. Co. Ltd.: Ceramic resonator (T
Addition of CHAPTER 31 RECOMMENDED SOLDERING CONDITIONS
Addition of APPENDIX F REVISION HISTORY
μ
PD70F3739GC-UEU-AX, 70F3740GC-UEU-AX, 70F3741GC-UEU-AX, 70F3742GC-UEU-AX
Modification of Caution in 15.6.10 Receive data noise filter
Modification of Figure 15-15. Timing of RXDAn Signal Judged as Noise
Modification of Flash Memory Programming Characteristics
Addition of Remark to CHAPTER 29 (3) Programming characteristics
APPENDIX F REVISION HISTORY
Description
Description
A
= −20 to +80°C)
APPENDIX F REVISION HISTORY
A
= −10 to
Throughout
CHAPTER 7 16-BIT
TIMER/EVENT
COUNTER P (TMP)
CHAPTER 8 16-BIT
TIMER/EVENT
COUNTER Q (TMQ)
CHAPTER 13 A/D
CONVERTER
CHAPTER 15
ASYNCHRONOUS
SERIAL
INTERFACE A
(UARTA)
CHAPTER 18 DMA
FUNCTION (DMA
CONTROLLER)
CHAPTER 27
FLASH MEMORY
CHAPTER 29
ELECTRICAL
SPECIFICATIONS
CHAPTER 31
RECOMMENDED
SOLDERING
CONDITIONS
APPENDIX F
REVISION
HISTORY
Page 870 of 870
Applied to: