UPD70F3740GC-UEU-AX Renesas Electronics America, UPD70F3740GC-UEU-AX Datasheet - Page 350

• Manufacturer Part Number: UPD70F3740GC-UEU-AX
• Description: MCU 32BIT V850ES/JX3 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3r

Specifications of UPD70F3740GC-UEU-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3
R01UH0015EJ0300 Rev.3.00
Sep 30, 2010
<1> Count operation start flow
TQ0CCR0 to TQ0CCR3 registers
(TQ0CKS0 to TQ0CKS2 bits)
Register initial setting
Remark
TQ0CTL1 register,
TQ0IOC0 register,
TQ0IOC2 register,
TQ0CTL0 register
TQ0CE bit = 1
START
Figure 8-23. Software Processing Flow in One-Shot Pulse Output Mode (2/2)
m = 0 to 3
Initial setting of these
registers is performed
before setting the
TQ0CE bit to 1.
The TQ0CKS0 to
TQ0CKS2 bits can be
set at the same time
when counting has been
started (TQ0CE bit = 1).
Trigger wait status
CHAPTRER 8 16-BIT TIMER/EVENT COUNTER Q (TMQ)
<2> TQ0CCR0 to TQ0CCR3 register setting change flow
<3> Count operation stop flow
Setting of TQ0CCR0 to TQ0CCR3
TQ0CE bit = 0
registers
STOP
Count operation is
stopped
As rewriting the
TQ0CCRm register
immediately forwards
to the CCRm buffer
register, rewriting
immediately after
the generation of the
INTTQ0CCR0 signal
is recommended.
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