UPD70F3740GC-UEU-AX Renesas Electronics America, UPD70F3740GC-UEU-AX Datasheet - Page 238

• Manufacturer Part Number: UPD70F3740GC-UEU-AX
• Description: MCU 32BIT V850ES/JX3 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3r

Specifications of UPD70F3740GC-UEU-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3
7.5.3
is set to 1. When the valid edge of an external trigger input signal is detected, 16-bit timer/event counter P starts counting,
and outputs a PWM waveform from the TOPn1 pin.
trigger, a square wave that has one cycle of the PWM waveform as half its cycle can also be output from the TOPn0 pin.
R01UH0015EJ0300 Rev.3.00
Sep 30, 2010
In the external trigger pulse output mode, 16-bit timer/event counter P waits for a trigger when the TPnCTL0.TPnCE bit
Pulses can also be output by generating a software trigger instead of using the external trigger. When using a software
TIPn0 pin
External trigger pulse output mode (TPnMD2 to TPnMD0 bits = 010)
Remark
selection
Count
clock
Software trigger
generation
TPnCE bit
n = 0 to 5
detector
Edge
Figure 7-16. Configuration in External Trigger Pulse Output Mode
control
Count
start
CHAPTER 7 16-BIT TIMER/EVENT COUNTER P (TMP)
CCR1 buffer register
CCR0 buffer register
TPnCCR1 register
TPnCCR0 register
16-bit counter
Match signal
Match signal
Clear
Transfer
Transfer
S
R
controller
controller
Output
(RS-FF)
Output
INTTPnCC1 signal
INTTPnCC0 signal
Page 222 of 870
TOPn1 pin
TOPn0 pin