UPD70F3740GC-UEU-AX Renesas Electronics America, UPD70F3740GC-UEU-AX Datasheet - Page 548

no-image

UPD70F3740GC-UEU-AX

Manufacturer Part Number
UPD70F3740GC-UEU-AX
Description
MCU 32BIT V850ES/JX3 100-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3r
Datasheet

Specifications of UPD70F3740GC-UEU-AX

Core Processor
RISC
Core Size
32-Bit
Speed
32MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
84
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3740GC-UEU-AX
Manufacturer:
NEC
Quantity:
300
Part Number:
UPD70F3740GC-UEU-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
UPD70F3740GC-UEU-AX
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
V850ES/JG3
16.9 Cautions
R01UH0015EJ0300 Rev.3.00
Sep 30, 2010
(1) When transferring transmit data and receive data using DMA transfer, error processing cannot be performed even if
(2) In regards to registers that are forbidden from being rewritten during operations (CBnCTL0.CBnPWR bit is 1), if
(3) In communication type 2 and 4 (CBnCTL1.CBnDAP bit = 1), the CBnSTR.CBnTSF bit is cleared half a SCKBn
Remark
an overrun error occurs during serial transfer. Check that the no overrun error has occurred by reading the
CBnSTR.CBnOVE bit after DMA transfer has been completed.
rewriting has been carried out by mistake during operations, set the CBnCTL0.CBnPWR bit to 0 once, then
initialize CSIBn.
Registers to which rewriting during operation are prohibited are shown below.
• CBnCTL0 register: CBnTXE, CBnRXE, CBnDIR, CBnTMS bits
• CBnCTL1 register: CBnCKP, CBnDAP, CBnCKS2 to CBnCKS0 bits
• CBnCTL2 register: CBnCL3 to CBnCL0 bits
clock after occurrence of a reception complete interrupt (INTCBnR).
In the single transfer mode, writing the next transmit data is ignored during communication (CBnTSF bit = 1), and
the next communication is not started.
CBnCTL0.CBnRXE bit = 1) is set, the next communication is not started even if the receive data is read during
communication (CBnTSF bit = 1).
Therefore, when using the single transfer mode with communication type 2 or 4 (CBnDAP bit = 1), pay particular
attention to the following.
• To start the next transmission, confirm that CBnTSF bit = 0 and then write the transmit data to the CBnTX
• To perform the next reception continuously when reception-only communication (CBnTXE bit = 0, CBnRXE bit =
Or, use the continuous transfer mode instead of the single transfer mode. Use of the continuous transfer mode is
recommended especially for using DMA.
register.
1) is set, confirm that CBnTSF bit = 0 and then read the CBnRX register.
n = 0 to 4
CHAPTER 16 3-WIRE VARIABLE-LENGTH SERIAL I/O (CSIB)
Also if reception-only communication (CBnCTL0.CBnTXE bit = 0,
Page 532 of 870

Related parts for UPD70F3740GC-UEU-AX