UPD70F3740GC-UEU-AX Renesas Electronics America, UPD70F3740GC-UEU-AX Datasheet - Page 799

• Manufacturer Part Number: UPD70F3740GC-UEU-AX
• Description: MCU 32BIT V850ES/JX3 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3r

Specifications of UPD70F3740GC-UEU-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3
(2) In separate bus mode
(a) Read cycle (CLKOUT asynchronous): In separate bus mode
(T
Note
Remarks 1. t
R01UH0015EJ0300 Rev.3.00
Sep 30, 2010
Address setup time (to RD↓)
Address hold time (from RD↑)
RD low-level width
Data setup time (to RD↑)
Data hold time (from RD↑)
Data setup time (to address)
WAIT setup time (to RD↓)
WAIT hold time (from RD↓)
WAIT setup time (to address)
WAIT hold time (from address)
A
= −40 to +85°C, V
Caution When operating at f
The address may be changed during the low-level period of the RD pin. To avoid the address change, insert an
idle wait.
2. T = 1/f
3. n: Number of wait clocks inserted in the bus cycle
4. i: Number of idle states inserted after a read cycle (0 or 1)
5. The values in the above specifications are values for when clocks with a 1:1 duty ratio are input from X1.
Parameter
t
The sampling timing changes when a programmable wait is inserted
ASW
AHW
data waits.
: Number of address setup wait clocks
: Number of address hold wait clocks
CPU
DD
(f
= EV
CPU
: CPU operating clock frequency)
DD
= AV
XX
REF0
t
t
t
t
t
t
t
t
t
t
t
t
t
t
SARD
HARD
WRDL
SISD
HISD
SAID
SRDWT1
SRDWT2
HRDWT1
HRDWT2
SAWT1
SAWT2
HAWT1
HAWT2
> 20 MHz, be sure to insert address hold waits, address setup waits, and
Symbol
= AV
REF1
<38>
<39>
<40>
<41>
<42>
<43>
<44>
<45>
<46>
<47>
<48>
<49>
<50>
<51>
, V
SS
Conditions
= EV
CHAPTER 29
SS
= AV
(1.5
(1 + n + t
SS
(0.5 + t
(n + t
(n − 0.5 + t
(n + 0.5 + t
+
= 0 V, C
IT − 3.5
n + t
ASW
MIN.
−3.5
ASW
23
ASW
AHW
+ t
)T − 27
Note
+ t
AHW
AHW
AHW
)T − 10
L
AHW
ELECTRICAL SPECIFICATIONS
= 50 pF)
)T
)T
)T
)T
(1 + n + t
(2
(1 + t
(0.5 + n + t
+
(0.5 + t
n + t
ASW
ASW
ASW
MAX.
+ t
AHW
+ t
+ t
AHW
AHW
)T − 25
AHW
AHW
)T − 25
)T − 45
)T − 40
)T − 45
Page 783 of 870
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns