UPD70F3740GC-UEU-AX Renesas Electronics America, UPD70F3740GC-UEU-AX Datasheet - Page 543

• Manufacturer Part Number: UPD70F3740GC-UEU-AX
• Description: MCU 32BIT V850ES/JX3 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3r

Specifications of UPD70F3740GC-UEU-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3
16.6.14 Clock timing
R01UH0015EJ0300 Rev.3.00
Sep 30, 2010
Notes 1. The INTCBnT interrupt is set when the data written to the CBnTX register is transferred to the data shift
Caution In single transfer mode, writing to the CBnTX register with the CBnTSF bit set to 1 is ignored.
2. The INTCBnR interrupt occurs if reception is correctly ended and receive data is ready in the CBnRX
SIBn capture
SCKBn pin
SOBn pin
Reg-R/W
INTCBnT
interrupt
SCKBn pin
SIBn capture
SOBn pin
Reg-R/W
INTCBnR
interrupt
CBnTSF bit
register in the continuous transmission or continuous transmission/reception mode.
transmission or single transmission/reception mode, the INTCBnT interrupt request signal is not
generated, but the INTCBnR interrupt request signal is generated upon end of communication.
register while reception is enabled.
generated even in the transmission mode, upon end of communication.
This has no influence on the operation during transfer.
For example, if the next data is written to the CBnTX register when DMA is started by generating
the INTCBnR signal, the written data is not transferred because the CBnTSF bit is set to 1.
Use the continuous transfer mode, not the single transfer mode, for such applications.
INTCBnT
interrupt
INTCBnR
interrupt
CBnTSF bit
Note 1
Note 2
Note 1
Note 2
(ii) Communication type 3 (CBnCKP and CBnDAP bits = 10)
(i) Communication type 1 (CBnCKP and CBnDAP bits = 00)
D7
D7
CHAPTER 16 3-WIRE VARIABLE-LENGTH SERIAL I/O (CSIB)
D6
D6
In the single mode, the INTCBnR interrupt request signal is
D5
D5
D4
D4
D3
D3
D2
D2
D1
D1
D0
D0
In the single
Page 527 of 870
(1/2)