UPD70F3740GC-UEU-AX Renesas Electronics America, UPD70F3740GC-UEU-AX Datasheet - Page 153

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UPD70F3740GC-UEU-AX

Manufacturer Part Number
UPD70F3740GC-UEU-AX
Description
MCU 32BIT V850ES/JX3 100-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3r
Datasheet

Specifications of UPD70F3740GC-UEU-AX

Core Processor
RISC
Core Size
32-Bit
Speed
32MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
84
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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P02
P03
P04
P05
P06
P10
P11
P30
P31
P32
P33
Name
Caution When using one of the P10 and P11 pins as an I/O port and the other as a D/A output pin (ANO0, ANO1), do so in an application where the port I/O level does not
Pin
Note The INTP7 pin and RXDA0 pin are alternate-function pins. When using the pin as the RXDA0 pin, disable edge detection for the alternate-function INTP7 pin (clear the
INTF3.INTF31 bit and INTR3.INTR31 bit to 0). When using the pin as the INTP7 pin, stop the UARTA0 reception operation (clear the UA0CTL0.UA0RXE bit to 0).
NMI
INTP0
ADTRG
INTP1
INTP2
DRST
INTP3
ANO0
ANO1
TXDA0
SOB4
RXDA0
INTP7
SIB4
ASCKA0
SCKB4
TIP00
TOP00
TIP01
TOP01
Alternate Function
Name
change during D/A output.
Input
Input
Input
Input
Input
Input
Input
Output
Output
Output
Output
Input
Input
Input
Input
I/O
Input
Output
Input
Output
I/O
P02 = Setting not required
P03 = Setting not required
P03 = Setting not required
P04 = Setting not required
P05 = Setting not required
P05 = Setting not required
P06 = Setting not required
P10 = Setting not required
P11 = Setting not required
P30 = Setting not required
P30 = Setting not required
P31 = Setting not required
P31 = Setting not required
P31 = Setting not required
P32 = Setting not required
P32 = Setting not required
P32 = Setting not required
P32 = Setting not required
P33 = Setting not required
P33 = Setting not required
Pn Register
Pnx Bit of
PM02 = Setting not required
PM03 = Setting not required
PM03 = Setting not required
PM04 = Setting not required
PM05 = Setting not required
PM05 = Setting not required PMC05 = Setting not required
PM06 = Setting not required
PM10 = 1
PM11 = 1
PM30 = Setting not required
PM30 = Setting not required
PM31 = Setting not required
PM31 = Setting not required
PM31 = Setting not required
PM32 = Setting not required
PM32 = Setting not required
PM32 = Setting not required
PM32 = Setting not required
PM33 = Setting not required
PM33 = Setting not required
PMn Register
PMnx Bit of
Table 4-15. Using Port Pin as Alternate-Function Pin (1/7)
PMC02 = 1
PMC03 = 1
PMC03 = 1
PMC04 = 1
PMC05 = 1
PMC06 = 1
PMC30 = 1
PMC30 = 1
PMC31 = 1
PMC31 = 1
PMC31 = 1
PMC32 = 1
PMC32 = 1
PMC32 = 1
PMC32 = 1
PMC33 = 1
PMC33 = 1
PMCn Register
PMCnx Bit of
PFCE32 = 0
PFCE32 = 0
PFCE32 = 1
PFCE32 = 1
PFCEn Register
PFCEnx Bit of
PFC03 = 0
PFC03 = 1
PFC30 = 0
PFC30 = 1
Note, PFC31 = 0
Note, PFC31 = 0
PFC31 = 1
PFC32 = 0
PFC32 = 1
PFC32 = 0
PFC32 = 1
PFC33 = 0
PFC33 = 1
PFCn Register
PFCnx Bit of
OCDM0 (OCDM) = 1
(Registers)
Other Bits

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