UPD70F3740GC-UEU-AX Renesas Electronics America, UPD70F3740GC-UEU-AX Datasheet - Page 71

• Manufacturer Part Number: UPD70F3740GC-UEU-AX
• Description: MCU 32BIT V850ES/JX3 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3r

Specifications of UPD70F3740GC-UEU-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3
R01UH0015EJ0300 Rev.3.00
Sep 30, 2010
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Address
External interrupt falling edge specification register 9H INTF9H
External interrupt rising edge specification register 0
External interrupt rising edge specification register 3
External interrupt rising edge specification register 9H INTR9H
Port 0 function register
Port 3 function register
Port 3 function register L
Port 3 function register H
Port 4 function register
Port 5 function register
Port 9 function register
Port 9 function register L
Port function 9 register H
CSIB0 control register 0
CSIB0 control register 1
CSIB0 control register 2
CSIB0 status register
CSIB0 receive data register
CSIB0 receive data register L
CSIB0 transmit data register
CSIB0 transmit data register L
CSIB1 control register 0
CSIB1 control register 1
CSIB1 control register 2
CSIB1 status register
CSIB1 receive data register
CSIB1 receive data register L
CSIB1 transmit data register
CSIB1 transmit data register L
CSIB2 control register 0
CSIB2 control register 1
CSIB2 control register 2
CSIB2 status register
CSIB2 receive data register
CSIB2 receive data register L
CSIB2 transmit data register
CSIB2 transmit data register L
CSIB3 control register 0
CSIB3 control register 1
CSIB3 control register 2
CSIB3 status register
CSIB3 receive data register
CSIB3 receive data register L
Function Register Name
INTR0
INTR3
PF0
PF3
PF3L
PF3H
PF4
PF5
PF9
PF9L
PF9H
CB0CTL0
CB0CTL1
CB0CTL2
CB0STR
CB0RX
CB0RXL
CB0TX
CB0TXL
CB1CTL0
CB1CTL1
CB1CTL2
CB1STR
CB1RX
CB1RXL
CB1TX
CB1TXL
CB2CTL0
CB2CTL1
CB2CTL2
CB2STR
CB2RX
CB2RXL
CB2TX
CB2TXL
CB3CTL0
CB3CTL1
CB3CTL2
CB3STR
CB3RX
CB3RXL
Symbol
R/W
R/W
R/W
R/W
R/W
R
R
R
R
CHAPTER 3 CPU FUNCTION
Manipulatable Bits
1
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
8
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
16
√
√
√
√
√
√
√
√
√
00H
00H
00H
00H
00H
0000H
00H
00H
00H
00H
0000H
00H
00H
01H
00H
00H
00H
0000H
00H
0000H
00H
01H
00H
00H
00H
0000H
00H
0000H
00H
01H
00H
00H
00H
0000H
00H
0000H
00H
01H
00H
00H
00H
0000H
00H
Default Value
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