UPD70F3740GC-UEU-AX Renesas Electronics America, UPD70F3740GC-UEU-AX Datasheet - Page 498

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UPD70F3740GC-UEU-AX

Manufacturer Part Number
UPD70F3740GC-UEU-AX
Description
MCU 32BIT V850ES/JX3 100-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3r
Datasheet

Specifications of UPD70F3740GC-UEU-AX

Core Processor
RISC
Core Size
32-Bit
Speed
32MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
84
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3740GC-UEU-AX
Manufacturer:
NEC
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300
Part Number:
UPD70F3740GC-UEU-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
UPD70F3740GC-UEU-AX
Manufacturer:
RENESAS/瑞萨
Quantity:
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V850ES/JG3
R01UH0015EJ0300 Rev.3.00
Sep 30, 2010
(6) Baud rate during continuous transmission
During continuous transmission, the transfer rate from the stop bit to the next start bit is usually 2 base clocks
longer. However, timing initialization is performed via start bit detection by the receiving side, so this has no
influence on the transfer result.
Assuming 1 bit data length: FL; stop bit length: FLstp; and base clock frequency: f
equation.
Therefore, the transfer rate during continuous transmission is as follows.
FLstp = FL + 2/f
Transfer rate = 11 × FL + (2/f
Start bit
FL
Bit 0
UCLK
FL
Figure 15-18. Transfer Rate During Continuous Transfer
Bit 1
FL
UCLK
1 data frame
CHAPTER 15 ASYNCHRONOUS SERIAL INTERFACE A (UARTA)
)
Bit 7
FL
Parity bit
FL
Stop bit
FLstp
Start bit
FL
UCLK
Start bit of 2nd byte
, we obtain the following
Bit 0
FL
Page 482 of 870

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