UPD70F3740GC-UEU-AX Renesas Electronics America, UPD70F3740GC-UEU-AX Datasheet - Page 746

• Manufacturer Part Number: UPD70F3740GC-UEU-AX
• Description: MCU 32BIT V850ES/JX3 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3r

Specifications of UPD70F3740GC-UEU-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3
R01UH0015EJ0300 Rev.3.00
Sep 30, 2010
Cautions 1. Be sure to connect the REGC pin to GND via a 4.7
SI/RxD
SO/TxD Output Transmit signal
SCK
CLK
/RESET Output Reset signal
FLMD0 Output Write voltage
FLMD1 Output Write voltage
HS
VDD
GND
Signal
Name
Flash Programmer (PG-FP4)
Connection Pins
2. A clock cannot be supplied from the CLK pin of the flash programmer. Create an oscillator on the
Output Transfer clock
Output Clock to
Input Receive signal
Input Handshake
I/O
−
−
Table 27-6. Wiring of Flash Writing Adapter for V850ES/JG3 (FA-100GC-8EU-A) (1/2)
board and supply the clock from that oscillator.
V850ES/JG3
signal of CSI0
+ HS
communication
VDD voltage
generation/
voltage monitor
Ground
Pin Function
X2
FLMD0
FLMD1
VDD
SI
SO
SCK
X1
/RESET
RESERVE/
HS
GND
Pin Name
on FA
Board
P41/SOB0/SCL01 23
P40/SIB0/SDA01
P42/SCKB0
Not necessary
Not necessary
RESET
FLMD0
PDL5/AD5/FLMD1 76
PCM0/WAIT
V
EV
AV
AV
V
AV
EV
DD
SS
When CSIB0 + HS Is
REF0
REF1
SS
DD
SS
Pin Name
Used
22
24
14
8
61
9
34,
70
1
5
11
2
33,
69
No.
Pin
−
−
P41/SOB0/SCL01 23
P40/SIB0/SDA01
P42/SCKB0
Not necessary
Not necessary
RESET
FLMD0
PDL5/AD5/FLMD1 76
Not necessary
V
EV
AV
AV
V
AV
EV
μ
F (recommended value) capacitor.
When CSIB0 Is Used
DD
SS
REF0
REF1
SS
DD
SS
Pin Name
CHAPTER 27 FLASH MEMORY
22
24
14
8
9
34,
70
1
5
11
2
33,
69
No.
Pin
−
−
−
P30/TXDA0/SOB4
P31/RXDA0/INTP7/
SIB4
Not necessary
Not necessary
Not necessary
RESET
FLMD0
PDL5/AD5/FLMD1
Not necessary
V
EV
AV
AV
V
AV
EV
When UARTA0 Is Used
DD
SS
REF0
REF1
SS
DD
SS
Pin Name
Page 730 of 870
25
26
14
8
76
9
34,
70
1
5
11
2
33,
69
Pin
No.
−
−
−
−