UPD70F3740GC-UEU-AX Renesas Electronics America, UPD70F3740GC-UEU-AX Datasheet - Page 603

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UPD70F3740GC-UEU-AX

Manufacturer Part Number
UPD70F3740GC-UEU-AX
Description
MCU 32BIT V850ES/JX3 100-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3r
Datasheet

Specifications of UPD70F3740GC-UEU-AX

Core Processor
RISC
Core Size
32-Bit
Speed
32MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
84
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Quantity
Price
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Part Number:
UPD70F3740GC-UEU-AX
Manufacturer:
Renesas Electronics America
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Part Number:
UPD70F3740GC-UEU-AX
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V850ES/JG3
R01UH0015EJ0300 Rev.3.00
Sep 30, 2010
(4) Wait state cancellation method
(5) Stop condition detection
The four wait state cancellation methods are as follows.
• By setting the IICCn.WRELn bit to 1
• By writing to the IICn register
• By start condition setting (IICCn.STTn bit = 1)
• By stop condition setting (IICCn.SPTn bit = 1)
When an 8-clock wait has been selected (WTIMn bit = 0), whether or not ACK has been generated must be
determined prior to wait cancellation.
Remark
The INTIICn signal is generated when a stop condition is detected.
Remark
Note Master only
n = 0 to 2
n = 0 to 2
Note
Note
CHAPTER 17 I
Page 587 of 870
2
C BUS

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