UPD70F3740GC-UEU-AX Renesas Electronics America, UPD70F3740GC-UEU-AX Datasheet - Page 371

• Manufacturer Part Number: UPD70F3740GC-UEU-AX
• Description: MCU 32BIT V850ES/JX3 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3r

Specifications of UPD70F3740GC-UEU-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3
R01UH0015EJ0300 Rev.3.00
Sep 30, 2010
Figure 8-32. Software Processing Flow in Free-Running Timer Mode (Compare Function) (2/2)
<1> Count operation start flow
<2> Overflow flag clear flow
<3> Count operation stop flow
TQ0CCR0 to TQ0CCR3 registers
(TQ0CKS0 to TQ0CKS2 bits)
TQ0OVF bit (CLR TQ0OVF).
Execute instruction to clear
Read TQ0OPT0 register
Register initial setting
(check overflow flag).
TQ0OPT0 register,
TQ0CTL1 register,
TQ0IOC0 register,
TQ0IOC2 register,
TQ0CTL0 register
TQ0OVF bit = 1
TQ0CE bit = 1
TQ0CE bit = 0
START
STOP
YES
CHAPTRER 8 16-BIT TIMER/EVENT COUNTER Q (TMQ)
NO
Counter is initialized and
counting is stopped by
clearing TQ0CE bit to 0.
Initial setting of these registers
is performed before setting the
TQ0CE bit to 1.
The TQ0CKS0 to TQ0CKS2 bits
can be set at the same time
when counting has been started
(TQ0CE bit = 1).
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