UPD70F3740GC-UEU-AX Renesas Electronics America, UPD70F3740GC-UEU-AX Datasheet - Page 190

• Manufacturer Part Number: UPD70F3740GC-UEU-AX
• Description: MCU 32BIT V850ES/JX3 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3r

Specifications of UPD70F3740GC-UEU-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3
R01UH0015EJ0300 Rev.3.00
Sep 30, 2010
Note This idle state (TI) does not depend on the BCC register settings.
Remark
Remarks 1. TASW (address setup wait): Image of high-level width of T1 state expanded.
AD7 to AD0
WR1, WR0
A21 to A0
CLKOUT
HLDRQ
HLDAK
AD15 to AD0
2. TAHW (address hold wait): Image of low-level width of T1 state expanded.
3. The broken lines indicate high impedance.
The broken lines indicate high impedance.
Figure 5-14. Address Wait Timing (Separate Bus Read, Bus Size: 16 Bits, 16-Bit Access)
A21 to A0
CLKOUT
11
ASTB
WAIT
T1
RD
A1
10
Figure 5-13. Separate Bus Hold Timing (Bus Size: 8 Bits, Write)
T2
D1
T1
11
T1
A1
D1
A2
T2
10
T2
D2
Undefined
11
TI
AD15 to AD0
Note
A21 to A0
CLKOUT
ASTB
WAIT
TH
RD
TH
TASW
CHAPTER 5 BUS CONTROL FUNCTION
TH
T1
TH
A1
TAHW
Undefined
D1
TI
Note
11
T2
T1
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A3
10
T2
D3
11