UPD70F3740GC-UEU-AX Renesas Electronics America, UPD70F3740GC-UEU-AX Datasheet - Page 379

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UPD70F3740GC-UEU-AX

Manufacturer Part Number
UPD70F3740GC-UEU-AX
Description
MCU 32BIT V850ES/JX3 100-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3r
Datasheet

Specifications of UPD70F3740GC-UEU-AX

Core Processor
RISC
Core Size
32-Bit
Speed
32MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
84
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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V850ES/JG3
R01UH0015EJ0300 Rev.3.00
Sep 30, 2010
Note The TQ0OVF0 and TQ0OVF1 flags are set on the internal RAM by software.
<1> Read the TQ0CCR0 register (setting of the default value of the TIQ00 pin input).
<2> Read the TQ0CCR1 register (setting of the default value of the TIQ01 pin input).
<3> An overflow occurs. Set the TQ0OVF0 and TQ0OVF1 flags to 1 in the overflow interrupt servicing,
<4> Read the TQ0CCR0 register.
<5> Read the TQ0CCR1 register.
<6> Same as <3>
TQ0CCR0 register
TQ0CCR1 register
and clear the overflow flag to 0.
Read the TQ0OVF0 flag. If the TQ0OVF0 flag is 1, clear it to 0.
Because the TQ0OVF0 flag is 1, the pulse width can be calculated by (10000H + D
Read the TQ0OVF1 flag. If the TQ0OVF1 flag is 1, clear it to 0 (the TQ0OVF0 flag is cleared in <4>,
and the TQ0OVF1 flag remains 1).
Because the TQ0OVF1 flag is 1, the pulse width can be calculated by (10000H + D
(correct).
INTTQ0OV signal
TQ0OVF0 flag
TQ0OVF1 flag
TIQ00 pin input
TIQ01 pin input
16-bit counter
Example when two capture registers are used (using overflow interrupt)
TQ0OVF bit
TQ0CE bit
FFFFH
0000H
Note
Note
D
00
<1>
D
CHAPTRER 8 16-BIT TIMER/EVENT COUNTER Q (TMQ)
10
<2>
D
00
<3>
D
D
01
10
<4>
D
11
<5> <6>
D
01
D
11
01
− D
00
Page 363 of 870
).
11
− D
10
)
(1/2)

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