UPD70F3740GC-UEU-AX Renesas Electronics America, UPD70F3740GC-UEU-AX Datasheet - Page 727

• Manufacturer Part Number: UPD70F3740GC-UEU-AX
• Description: MCU 32BIT V850ES/JX3 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3r

Specifications of UPD70F3740GC-UEU-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3
24.4.2 To use for interrupt
R01UH0015EJ0300 Rev.3.00
Sep 30, 2010
<To start operation>
<1> Mask the interrupt of LVI.
<2> Select the voltage to be detected by using the LVIS.LVIS0 bit.
<3> Set the LVIM.LVION bit to 1 (to enable operation).
<4> Insert a wait cycle of 0.2 ms (max.) or more by software.
<5> By using the LVIM.LVIF bit, check if the supply voltage > detected voltage.
<6> Clear the interrupt request flag of LVI.
<7> Unmask the interrupt of LVI.
<To stop operation>
Clear the LVION bit to 0.
Note Since the LVION bit is the initial value (operation disabled) due to the external reset input, no INTLVI
Caution When the INTLVI signal is generated, confirm, using the LVIM/LVIF bit, whether the INTLVI signal
LVI detected voltage
Supply voltage (V
interrupts occur.
Internal reset signal
External RESET IC
LVI detected signal
detected voltage
is generated due to a supply voltage drop or rise across the detected voltage.
(2.95 V (TYP.))
INTLVI signal
(active low)
RESET pin
LVION bit
Figure 24-3. Operation Timing of Low-Voltage Detector (LVIMD Bit = 0)
DD
)
Delay
Delay
CHAPTER 24 LOW-VOLTAGE DETECTOR (LVI)
Clear
Delay
Note
Time
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