UPD70F3740GC-UEU-AX Renesas Electronics America, UPD70F3740GC-UEU-AX Datasheet - Page 853

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UPD70F3740GC-UEU-AX

Manufacturer Part Number
UPD70F3740GC-UEU-AX
Description
MCU 32BIT V850ES/JX3 100-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3r
Datasheet

Specifications of UPD70F3740GC-UEU-AX

Core Processor
RISC
Core Size
32-Bit
Speed
32MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
84
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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V850ES/JG3
R01UH0015EJ0300 Rev.3.00
Sep 30, 2010
Port
functions
Function
Port 9
P9 register
PM9 register
PMC9 register
PFC9 register,
PFCE9 register
PFC9 register
PFCE9 register
Specification of
port 9 alternate
function
PF9 register
PDL register
PMDL register
PMCDL register
Using port pins
as alternate-
function pins
Details of
Function
The P90 to P97, P99, P910, and P912 to P915 pins have hysteresis
characteristics in the input mode of the alternate-function pin, but do not have the
hysteresis characteristics in the port mode.
To read/write bits 8 to 15 of the P9 register in 8-bit or 1-bit units, specify them as
bits 0 to 7 of the P9H register.
To read/write bits 8 to 15 of the PM9 register in 8-bit or 1-bit units, specify them
as bits 0 to 7 of the PM9H register.
To read/write bits 8 to 15 of the PMC9 register in 8-bit or 1-bit units, specify them
as bits 0 to 7 of the PMC9H register.
When using the A0 to A15 pins as the alternate functions of the P90 to P915 pins,
set all 16 bits of the PMC9 register to FFFFH at once.
When performing separate address bus output (A0 to A15), set the PMC9 register
to FFFFH for all 16 bits at once after clearing the PFC9 or PFCE9 register to
0000H.
To read/write bits 8 to 15 of the PFC9 register in 8-bit or 1-bit units, specify them
as bits 0 to 7 of the PFC9H register.
To read/write bits 8 to 15 of the PFCE9 register in 8-bit or 1-bit units, specify them
as bits 0 to 7 of the PFCE9H register.
The RXDA1 and KR7 pins must not be used at the same time. When using the
RXDA1 pin, do not use the KR7 pin. When using the KR7 pin, do not use the
RXDA1 pin (it is recommended to set the PFC91 bit to 1 and clear the PFCE91 bit
to 0).
When an output pin is pulled up at EV
To read/write bits 8 to 15 of the PF9 register in 8-bit or 1-bit units, specify them as
bits 0 to 7 of the PF9H register.
To read/write bits 8 to 15 of the PDL register in 8-bit or 1-bit units, specify them as
bits 0 to 7 of the PDLH register.
To read/write bits 8 to 15 of the PMDL register in 8-bit or 1-bit units, specify them
as bits 0 to 7 of the PMDLH register.
When the SMSEL bit of the EXIMC register = 1 (separate mode) and the BS30 to
BS00 bits of the BSC register = 0 (8-bit bus width), do not specify the AD8 to
AD15 pins.
To read/write bits 8 to 15 of the PMCDL register in 8-bit or 1-bit units, specify
them as bits 0 to 7 of the PMCDLH register.
The INTP7 pin and RXDA0 pin are alternate-function pins. When using the pin as
the RXDA0 pin, disable edge detection for the alternate-function INTP7 pin (clear
the INTF3.INTF31 bit and INTR3.INTR31 bit to 0). When using the pin as the
INTP7 pin, stop the UARTA0 reception operation (clear the UA0CTL0.UA0RXE
bit to 0).
When using one of the P10 and P11 pins as an I/O port and the other as a D/A
output pin (ANO0, ANO1), do so in an application where the port I/O level does
not change during D/A output.
When setting pins A0 to A15 as the alternate function, set all 16 bits of the PMC9
register to FFFFH at once.
The RXDA1 and KR7 pins must not be used at the same time. When using the
RXDA1 pin, do not use the KR7 pin. When using the KR7 pin, do not use the
RXDA1 pin (it is recommended to set the PFC91 bit to 1 and clear the PFCE91 bit
to 0).
Cautions
DD
or higher, be sure to set the PF9n bit to 1. p. 96
APPENDIX E LIST OF CAUTIONS
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