UPD70F3740GC-UEU-AX Renesas Electronics America, UPD70F3740GC-UEU-AX Datasheet - Page 770

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UPD70F3740GC-UEU-AX

Manufacturer Part Number
UPD70F3740GC-UEU-AX
Description
MCU 32BIT V850ES/JX3 100-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3r
Datasheet

Specifications of UPD70F3740GC-UEU-AX

Core Processor
RISC
Core Size
32-Bit
Speed
32MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
84
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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V850ES/JG3
28.2.3 Securement of user resources
implement each debug function. These items need to be set in the user program or using the compiler options.
R01UH0015EJ0300 Rev.3.00
Sep 30, 2010
The user must prepare the following to perform communication between MINICUBE2 and the target device and
(1) Securement of memory space
(2) Security ID setting
The shaded portions in Figure 28-4 are the areas reserved for placing the debug monitor program, so user
programs and data cannot be allocated in these spaces. These spaces must be secured so as not to be used by
the user program.
The ID code must be embedded in the area between 0000070H and 0000079H in Figure 28-4, to prevent the
memory from being read by an unauthorized person. For details, refer to 28.3 ROM Security Function.
CHAPTER 28 ON-CHIP DEBUG FUNCTION
Page 754 of 870

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