UPD70F3740GC-UEU-AX Renesas Electronics America, UPD70F3740GC-UEU-AX Datasheet - Page 805

• Manufacturer Part Number: UPD70F3740GC-UEU-AX
• Description: MCU 32BIT V850ES/JX3 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3r

Specifications of UPD70F3740GC-UEU-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3
(3) Bus hold
(a) CLKOUT asynchronous
(T
Remarks 1. T = 1/f
Bus Hold (CLKOUT Asynchronous)
R01UH0015EJ0300 Rev.3.00
Sep 30, 2010
A
Address bus (output)
HLDRQ high-level width
HLDAK low-level width
Delay time from HLDAK↑ to bus output
Delay time from HLDRQ↓ to HLDAK↓
Delay time from HLDRQ↑ to HLDAK↑
WR0, WR1 (output)
= −40 to +85°C, V
CLKOUT (output)
HLDAK (output)
HLDRQ (input)
ASTB (output)
Data bus (I/O)
RD (output),
2. n: Number of wait clocks inserted in the bus cycle
3. The values in the above specifications are values for when clocks with a 1:1 duty ratio are input from X1.
The sampling timing changes when a programmable wait is inserted.
Parameter
CPU
DD
(f
= EV
CPU
: CPU operating clock frequency)
DD
= AV
REF0
t
t
t
t
t
WHQH
WHAL
DHAC
DHQHA1
DHQHA2
= AV
Symbol
REF1
<81>
, V
TI
SS
<78>
<79>
<80>
<81>
<82>
= EV
CHAPTER 29
SS
Conditions
TH
= AV
SS
= 0 V, C
TH
<79>
L
Hi-Z
Hi-Z
Hi-Z
T − 15
T
ELECTRICAL SPECIFICATIONS
= 50 pF)
MIN.
0.5T
−3
+
10
TH
<82>
<78>
(2n
TI
1.5T
+
<80>
MAX.
7.5)T
+
26
Page 789 of 870
+
26
Unit
ns
ns
ns
ns
ns