UPD70F3740GC-UEU-AX Renesas Electronics America, UPD70F3740GC-UEU-AX Datasheet - Page 495

• Manufacturer Part Number: UPD70F3740GC-UEU-AX
• Description: MCU 32BIT V850ES/JX3 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3r

Specifications of UPD70F3740GC-UEU-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3
R01UH0015EJ0300 Rev.3.00
Sep 30, 2010
Remark
Baud Rate
(bps)
To set the baud rate, perform the following calculation for setting the UAnCTL1 and UAnCTL2 registers (when using
internal clock).
<1> Set k to fxx/(2 × target baud rate) and m to 0.
<2> If k is 256 or greater (k ≥ 256), reduce k to half (k/2) and increment m by 1 (m + 1).
<3> Repeat Step <2> until k becomes less than 256 (k < 256).
<4> Round off the first decimal point of k to the nearest whole number.
<5> Set the value of m to UAnCTL1 register and the value of k to the UAnCTL2 register.
Example: When f
The representative examples of baud rate settings are shown below.
153,600 00H
312,500 00H
625,000 00H
19,200 02H
31,250 02H
38,400 01H
76,800 00H
1,200 06H
2,400 05H
4,800 04H
9,600 03H
300 08H
600 07H
If k becomes 256 after round-off, perform Step <2> again to set k to 128.
f
ERR: Baud rate error (%)
XX
:
UAnCTL1
<1> k = 32,000,000/(2 × 153,600) = 104.16…, m = 0
<2>, <3> k = 104.16… < 256, m = 0
<4> Set value of UAnCTL2 register: k = 104 = 68H, set value of UAnCTL1 register: m = 0
Actual baud rate = 32,000,000/(2 × 104)
Baud rate error = {32,000,000/(2 × 104 × 153,600) − 1} × 100
Main clock frequency
XX
f
XX
D0H
D0H
D0H
D0H
D0H
D0H
D0H
80H
D0H
D0H
68H
33H
1AH
= 32 MHz and target baud rate = 153,600 bps
UAnCTL2
= 32 MHz
= 153,846 [bps]
= 0.160 [%]
Table 15-3. Baud Rate Generator Setting Data
0.16
0.16
0.16
0.16
0.16
0.16
0.16
0.00
0.16
0.16
0.16
0.39
−1.54
ERR (%)
CHAPTER 15 ASYNCHRONOUS SERIAL INTERFACE A (UARTA)
08H
07H
06H
05H
04H
03H
02H
01H
01H
00H
00H
00H
00H
UAnCTL1
f
XX
82H
82H
82H
82H
82H
82H
82H
A0H
82H
82H
41H
20H
10H
UAnCTL2
= 20 MHz
0.16
0.16
0.16
0.16
0.16
0.16
0.16
0.00
0.16
0.16
0.16
0.00
0.00
ERR (%)
07H
06H
05H
04H
03H
02H
01H
00H
00H
00H
00H
00H
00H
UAnCTL1
f
XX
82H
82H
82H
82H
82H
82H
82H
A0H
82H
41H
21H
10H
08H
UAnCTL2
= 10 MHz
Page 479 of 870
0.16
0.16
0.16
0.16
0.16
0.16
0.16
0.00
0.16
0.16
−1.36
0.00
0.00
ERR (%)