UPD70F3740GC-UEU-AX Renesas Electronics America, UPD70F3740GC-UEU-AX Datasheet - Page 617

• Manufacturer Part Number: UPD70F3740GC-UEU-AX
• Description: MCU 32BIT V850ES/JX3 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3r

Specifications of UPD70F3740GC-UEU-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3
R01UH0015EJ0300 Rev.3.00
Sep 30, 2010
Remarks 1. Conform the transmission and reception formats to the specifications of the product in communication.
2. When using the V850ES/JG3 as the master in the multimaster system, read the IICSn.MSTSn bit for
3. When using the V850ES/JG3 as the slave in the multimaster system, confirm the status using the
4. n = 0 to 2
each INTIICn interrupt occurrence to confirm the arbitration result.
IICSn and IICFn registers for each INTIICn interrupt occurrence to determine the next processing.
No
No
EXCn = 1 or COIn = 1?
Not in communication
Transfer completed?
interrupt occurred?
interrupt occurred?
Figure 17-19. Master Operation in Multimaster System (3/3)
MSTSn = 1?
ACKDn = 1?
MSTSn = 1?
ACKDn = 1?
WTIMn = 1
Restarted?
TRCn = 1?
Write IICn
Write IICn
STTn = 1
INTIICn
INTIICn
C
C
1
2
Yes
No
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
No
No
No
No
No
No
Communication start
(address, transfer direction specification)
Transmission start
Waiting for ACK detection
Waiting for data transmission
Slave operation
SPTn = 1
END
2
2
WTIMn = WRELn = 1
Transfer completed?
interrupt occurred?
interrupt occurred?
MSTSn = 1?
MSTSn = 1?
ACKEn = 1
WTIMn = 0
WRELn = 1
ACKEn = 0
Read IICn
INTIICn
INTIICn
Yes
Yes
Yes
Yes
Yes
No
No
No
No
No
Waiting for ACK detection
Reception start
Waiting for data
transmission
CHAPTER 17 I
2
2
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C BUS