UPD70F3740GC-UEU-AX Renesas Electronics America, UPD70F3740GC-UEU-AX Datasheet - Page 763

• Manufacturer Part Number: UPD70F3740GC-UEU-AX
• Description: MCU 32BIT V850ES/JX3 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3r

Specifications of UPD70F3740GC-UEU-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3
28.1 Debugging with DCU
debug emulator (MINICUBE).
28.1.1 Connection circuit example
28.1.2 Interface signals
R01UH0015EJ0300 Rev.3.00
Sep 30, 2010
Programs can be debugged using the debug interface pins (DRST, DCK, DMS, DDI, and DDO) to connect the on-chip
Notes 1. Example of pin connection when MINICUBE is not connected
The interface signals are described below.
(1) DRST
Figure 28-1. Circuit Connection Example When Debug Interface Pins Are Used for Communication Interface
This is a reset input signal for the on-chip debug unit. It is a negative-logic signal that asynchronously initializes
the debug control unit.
MINICUBE raises the DRST signal when it detects V
and starts the on-chip debug unit of the device.
When the DRST signal goes high, a reset signal is also generated in the CPU.
When starting debugging by starting the integrated debugger, a CPU reset is always generated.
2. A pull-down resistor is provided on chip.
3. For flash memory rewriting
MINICUBE
RESET
FLMD0
DRST
DMS
DDO
GND
VDD
DCK
DDI
Note 1
DD
of the target system after the integrated debugger is started,
CHAPTER 28 ON-CHIP DEBUG FUNCTION
EV
DCK
DMS
DDI
DDO
DRST
RESET
FLMD0
FLMD1/PDL5
EV
DD
SS
V850ES/JG3
Note 2
Note 3
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