UPD70F3740GC-UEU-AX Renesas Electronics America, UPD70F3740GC-UEU-AX Datasheet - Page 490

• Manufacturer Part Number: UPD70F3740GC-UEU-AX
• Description: MCU 32BIT V850ES/JX3 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3r

Specifications of UPD70F3740GC-UEU-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

<R>
<R>
V850ES/JG3
15.6.10 Receive data noise filter
the input data. Therefore, data not exceeding 1 clock width is judged to be noise and is not delivered to the internal circuit
(see Figure 15-15). See 15.7 (1) (a) Base clock regarding the base clock.
delayed by 3 clocks in relation to the external signal status.
R01UH0015EJ0300 Rev.3.00
Sep 30, 2010
Base clock (f
This filter samples the RXDAn pin using the base clock of the prescaler output.
When the same sampling value is read twice, the match detector output changes and the RXDAn signal is sampled as
Moreover, since the circuit is as shown in Figure 15-14, the processing that goes on within the receive operation is
Internal signal A
Internal signal B
Internal signal C
RXDAn (input)
RXDAn
Base clock
UCLK
)
In
Q
Figure 15-15. Timing of RXDAn Signal Judged as Noise
Internal signal A
CHAPTER 15 ASYNCHRONOUS SERIAL INTERFACE A (UARTA)
Figure 15-14. Noise Filter Circuit
Match
In
Q
(judged as noise)
Mismatch
Internal signal B
detector
Match
Match
In
LD_EN
Q
(judged as noise)
Mismatch
Internal signal C
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