UPD70F3740GC-UEU-AX Renesas Electronics America, UPD70F3740GC-UEU-AX Datasheet - Page 395

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UPD70F3740GC-UEU-AX

Manufacturer Part Number
UPD70F3740GC-UEU-AX
Description
MCU 32BIT V850ES/JX3 100-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3r
Datasheet

Specifications of UPD70F3740GC-UEU-AX

Core Processor
RISC
Core Size
32-Bit
Speed
32MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
84
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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V850ES/JG3
9.4
9.4.1
TM0CTL0.TM0CE bit is set to 1.
the count clock, and the counter starts counting.
0000H and a compare match interrupt request signal (INTTM0EQ0) is generated.
R01UH0015EJ0300 Rev.3.00
Sep 30, 2010
Caution Do not set the TM0CMP0 register to FFFFH.
In the interval timer mode, an interrupt request signal (INTTM0EQ0) is generated at the specified interval if the
When the TM0CE bit is set to 1, the value of the 16-bit counter is cleared from FFFFH to 0000H in synchronization with
When the count value of the 16-bit counter matches the value of the TM0CMP0 register, the 16-bit counter is cleared to
The interval can be calculated by the following expression.
Interval = (Set value of TM0CMP0 register + 1) × Count clock cycle
Operation
Interval timer mode
INTTM0EQ0 signal
TM0CMP0 register
Count clock
selection
16-bit counter
TM0CE bit
FFFFH
0000H
TM0CE bit
Figure 9-3. Basic Timing of Operation in Interval Timer Mode
Interval (D + 1)
Figure 9-2. Configuration of Interval Timer
D
TM0CMP0 register
16-bit counter
Interval (D + 1)
Clear
D
CHAPTER 9 16-BIT INTERVAL TIMER M (TMM)
Match signal
D
Interval (D + 1)
D
Interval (D + 1)
INTTM0EQ0 signal
D
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