UPD70F3740GC-UEU-AX Renesas Electronics America, UPD70F3740GC-UEU-AX Datasheet - Page 268

• Manufacturer Part Number: UPD70F3740GC-UEU-AX
• Description: MCU 32BIT V850ES/JX3 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3r

Specifications of UPD70F3740GC-UEU-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3
detected, the count value of the 16-bit counter is stored in the TPnCCRm register, and a capture interrupt request signal
(INTTPnCCm) is generated.
generates an overflow interrupt request signal (INTTPnOV) at the next clock, is cleared to 0000H, and continues counting.
At this time, the overflow flag (TPnOPT0.TPnOVF bit) is also set to 1. Clear the overflow flag to 0 by executing the CLR
instruction by software.
R01UH0015EJ0300 Rev.3.00
Sep 30, 2010
When the TPnCE bit is set to 1, the 16-bit counter starts counting. When the valid edge input to the TIPnm pin is
The 16-bit counter continues counting in synchronization with the count clock. When it counts up to FFFFH, it
Remark
INTTPnCC0 signal
INTTPnCC1 signal
TPnCCR0 register
TPnCCR1 register
INTTPnOV signal
TIPn0 pin input
TIPn1 pin input
16-bit counter
TPnOVF bit
Figure 7-30. Basic Timing in Free-Running Timer Mode (Capture Function)
TPnCE bit
n = 0 to 5
FFFFH
0000H
D
00
D
CLR instruction
Cleared to 0 by
10
CHAPTRER 7 16-BIT TIMER/EVENT COUNTER P (TMP)
D
00
D
D
01
10
D
11
CLR instruction
Cleared to 0 by
D
D
01
02
D
11
D
12
CLR instruction
Cleared to 0 by
D
02
D
03
D
12
D
13
D
03
D
13
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