UPD70F3740GC-UEU-AX Renesas Electronics America, UPD70F3740GC-UEU-AX Datasheet - Page 234

• Manufacturer Part Number: UPD70F3740GC-UEU-AX
• Description: MCU 32BIT V850ES/JX3 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3r

Specifications of UPD70F3740GC-UEU-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3
R01UH0015EJ0300 Rev.3.00
Sep 30, 2010
(2) Operation timing in external event count mode
Cautions 1. In the external event count mode, do not set the TPnCCR0 register to 0000H.
(a) Operation if TPnCCR0 register is set to FFFFH
If the TPnCCR0 register is set to FFFFH, the 16-bit counter counts to FFFFH each time the valid edge of the
external event count signal has been detected. The 16-bit counter is cleared to 0000H in synchronization with
the next count-up timing, and the INTTPnCC0 signal is generated. At this time, the TPnOPT0.TPnOVF bit is
not set.
Remark
2. In the external event count mode, use of the timer output is disabled. If performing timer
INTTPnCC0 signal
TPnCCR0 register
output using external event count input, set the interval timer mode, and select the operation
enabled by the external event count input for the count clock (TPnCTL1.TPnMD2 to
TPnCTL1.TPnMD0 bits = 000, TPnCTL1.TPnEEE bit = 1).
n = 0 to 5
16-bit counter
TPnCE bit
FFFFH
0000H
External event
count signal
interval
CHAPTER 7 16-BIT TIMER/EVENT COUNTER P (TMP)
External event
count signal
interval
FFFFH
External event
count signal
interval
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