UPD70F3451GC-UBT-A Renesas Electronics America, UPD70F3451GC-UBT-A Datasheet - Page 1012

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UPD70F3451GC-UBT-A

Manufacturer Part Number
UPD70F3451GC-UBT-A
Description
MCU 32BIT 128KB FLASH 80LQFP
Manufacturer
Renesas Electronics America
Series
V850E/Ix3r
Datasheet

Specifications of UPD70F3451GC-UBT-A

Core Processor
RISC
Core Size
32-Bit
Speed
64MHz
Connectivity
CSI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
44
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 5.5 V
Data Converters
A/D 10x12b, 4x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3451GC-UBT-A
Manufacturer:
Renesas Electronics America
Quantity:
10 000
20.4 External Interrupt Request Input Pins (INTP00 to INTP18, INTADT0, INTADT1)
20.4.1 Noise elimination
20.4.2 Edge detection
V850E/IG3: n = P00 to P18, ADT0, ADT1). The edge that can be selected as the valid edge is one of the following.
1010
(1) Noise elimination of INTP00, INTP01, INTPa (V850E/IG3 only), INTP08 to INTP13, INTP17, INTP18,
(2) Noise elimination of INTP14 to INTP16 pins
The valid edges of the INTn pin can be selected by program (V850E/IF3: n = P00, P01, P08 to P18, ADT0, ADT1,
• Rising edge
• Falling edge
• Both the rising and falling edges
The edge-detected INTn signal becomes an interrupt source.
The valid edge is specified by the INTR0 to INTR2, ADTR, INTF0 to INTF2, and ADTF registers.
INTADT0, and INTADT1 pins
The INTP00, INTP01, INTPa (V850E/IG3 only), INTP08 to INTP13, INTP17, INTP18, INTADT0, and INTADT1
pins incorporate a noise eliminator that uses analog filter (a = 02 to 07). Unless, therefore, the input level of
each pin is held for a certain time, an edge cannot be detected. An edge is detected after a certain time has
elapsed.
The INTP14 to INTP16 pins incorporate a digital noise eliminator.
The sampling clock that performs digital sampling can be selected by the INTNFCm.INTNFCm2 to
INTNFCm.INTNFCm0 bits (m = 14 to 16).
The system clock stops in the IDLE and STOP modes, so the INTP14 to INTP16 pins cannot be used to cancel
the IDLE and STOP modes.
CHAPTER 20 INTERRUPT/EXCEPTION PROCESSING FUNCTION
User’s Manual U18279EJ3V0UD

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