UPD70F3451GC-UBT-A Renesas Electronics America, UPD70F3451GC-UBT-A Datasheet - Page 1099

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UPD70F3451GC-UBT-A

Manufacturer Part Number
UPD70F3451GC-UBT-A
Description
MCU 32BIT 128KB FLASH 80LQFP
Manufacturer
Renesas Electronics America
Series
V850E/Ix3r
Datasheet

Specifications of UPD70F3451GC-UBT-A

Core Processor
RISC
Core Size
32-Bit
Speed
64MHz
Connectivity
CSI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
44
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 5.5 V
Data Converters
A/D 10x12b, 4x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3451GC-UBT-A
Manufacturer:
Renesas Electronics America
Quantity:
10 000
27.9.4 Flash functions
27.9.5 Pin processing
Initialize
Erase
Write
Check
Obtain
information
Setting
(1) FLMD0 pin
Type
The FLMD0 pin is used to set the operation mode when reset is released and to protect the flash memory from
being written during self rewriting. It is therefore necessary to keep the voltage applied to the FLMD0 pin at 0
V when reset is released and a normal operation is executed. It is also necessary to apply a voltage of EV
EV
control before the memory is rewritten.
When self programming has been completed, the voltage on the FLMD0 pin must be returned to 0 V.
Remark
Caution Make sure that the FLMD0 pin is at 0 V when reset is released.
DD1
, and EV
FlashEnv
FlashBlockErase
FlashWordWrite
FlashBlockBlankCheck
FlashBlockIVerify
FlashFLMDCheck
FlashGetInfo
FlashSetInfo
FlashBootSwap
FlashWordRead
Function Name
EV
DD
DD2
: EV
(V850E/IG3 only) level to the FLMD0 pin during the self programming mode period via port
DD0
RESET signal
FLMD0 pin
, EV
DD1
, and EV
FLE
FLBE
FLWW
FLBBC
FLBIV
FLFC
FLGI
FLSI
FLBS
FLWR
Abbr.
Figure 27-5. Mode Change Timing
Table 27-11. Flash Function List
EV
EV
CHAPTER 27 FLASH MEMORY
0 V
0 V
DD
DD
User’s Manual U18279EJ3V0UD
DD2
Initializes flash control.
Erases the specified block.
Successively writes the specified memory contents from the specified flash
memory address, for the number of words specified in 4-byte units.
Checks the erase status of the specified block.
Perform internal verify for the specified block.
Inputs FLMD0 pin and checks FLMD0 setting register value.
Sets the flash information.
Interchanges the contents of the boot swap cluster.
Reads out the data from the specified address.
Reads out information about the flash memory.
(V850E/IG3 only)
operation mode
Normal
Self programming mode
operation mode
Function
Normal
1097
DD0
,

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