UPD70F3451GC-UBT-A Renesas Electronics America, UPD70F3451GC-UBT-A Datasheet - Page 759

• Manufacturer Part Number: UPD70F3451GC-UBT-A
• Description: MCU 32BIT 128KB FLASH 80LQFP
• Manufacturer: Renesas Electronics America
• Series: V850E/Ix3r

Specifications of UPD70F3451GC-UBT-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: CSI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 44
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Data Converters: A/D 10x12b, 4x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

BRS
UB
15
0
0
0
0
•
•
•
1
1
1
1
(3) UARTB control register 2 (UBCTL2)
Remark
Remarks 1. f
BRS
UB
14
The UBCTL2 register is used to specify the division ratio by which to control the baud rate (serial transfer
speed) of UARTB.
This register can be read or written in 16-bit units.
Reset sets this register to FFFFH.
Caution When rewriting the UBBRS15 to UBBRS0 bits of this register, set the UBCTL0.UBTXE and
0
0
0
0
1
1
1
1
•
•
•
BRS
UB
13
0
0
0
0
•
•
•
1
1
1
1
For the UBBRS15 to UBBRS0 bits, see Table 15-2 Division Value of 16-bit Counter.
2. k: Value set by the UBCTL2.UBBRS15 to UBCTL2.UBBRS0 bits (k = 4, 5, 6, …, 65535)
3. x: Don’t care
UBCTL2
After reset: FFFFH
BRS
UBCTL0.UBRXE bits to 0 or clear the UBCTL0.UBPWR bit to 0.
XX
UB
12
0
0
0
0
•
•
•
1
1
1
1
: Peripheral clock
BRS
BRS
UB
UB
11
15
15
CHAPTER 15 ASYNCHRONOUS SERIAL INTERFACE B (UARTB)
0
0
0
0
1
1
1
1
•
•
•
BRS
UB
14
14
BRS
UB
10
0
0
0
0
1
1
1
1
•
•
•
BRS
UB
Table 15-2. Division Value of 16-bit Counter
13
13
BRS
UB
R/W
0
9
0
0
0
•
•
•
1
1
1
1
BRS
UB
12
12
BRS
UB
BRS
8
0
0
0
0
1
1
1
1
•
•
•
UB
11
11
User’s Manual U18279EJ3V0UD
Address: FFFFFA42H
BRS
BRS
UB
UB
10
10
7
0
0
0
0
1
1
1
1
•
•
•
BRS
UB
BRS
9
9
UB
0
0
0
0
1
1
1
1
6
•
•
•
BRS
UB
8
8
BRS
UB
5
0
0
0
0
1
1
1
1
•
•
•
BRS
UB
7
7
BRS
UB
BRS
4
0
0
0
0
1
1
1
1
UB
•
•
•
6
6
BRS
BRS
UB
UB
5
5
0
0
0
0
1
1
1
1
3
•
•
•
BRS
UB
4
4
BRS
UB
2
0
1
1
1
1
1
1
1
•
•
•
BRS
UB
3
3
BRS
UB
1
x
0
0
1
0
0
1
1
•
•
•
BRS
UB
2
2
BRS
BRS
UB
UB
0
x
0
1
0
•
•
•
0
1
0
1
1
1
BRS
UB
65532
65533
65534
65535
0
0
k
4
4
5
6
•
•
•
Selected
Output
Clock
f
f
f
f
f
f
f
f
XX
XX
XX
XX
XX
XX
XX
XX
•
•
•
/k
/k
/k
/k
/k
/k
/k
/k
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