UPD70F3451GC-UBT-A Renesas Electronics America, UPD70F3451GC-UBT-A Datasheet - Page 371

• Manufacturer Part Number: UPD70F3451GC-UBT-A
• Description: MCU 32BIT 128KB FLASH 80LQFP
• Manufacturer: Renesas Electronics America
• Series: V850E/Ix3r

Specifications of UPD70F3451GC-UBT-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: CSI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 44
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Data Converters: A/D 10x12b, 4x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

TABnIOC2
TABnIOC0
• When TABnOLb bit = 0
(c) TABn I/O control register 0 (TABnIOC0)
(d) TABn I/O control register 2 (TABnIOC2)
(e) TABn counter read buffer register (TABnCNT)
TOBnb pin output
The value of the 16-bit counter can be read by reading the TABnCNT register.
TABnOL3
16-bit counter
0/1
0
TABnOE3 TABnOL2 TABnOE2
0/1
Figure 7-30. Setting of Registers in PWM Output Mode (2/3)
0
CHAPTER 7 16-BIT TIMER/EVENT COUNTER AB (TAB)
0/1
0
0/1
User’s Manual U18279EJ3V0UD
0
TABnEES1
TABnOL1
0/1
0/1
TABnEES0
TABnOE1 TABnOL0 TABnOE0
• When TABnOLb bit = 1
0/1
0/1
TOBnb pin output
16-bit counter
TABnETS1
0/1
0
TABnETS0
0/1
0
Select valid edge of
external event count
input (EVTBn pin).
0: Disable TOBn0 pin output
1: Enable TOBn0 pin output
Setting of TOBn0 pin output
level before count operation
0: Low level
1: High level
0: Disable TOBn1 pin output
1: Enable TOBn1 pin output
Setting of TOBn1 pin output
level before count operation
0: Low level
1: High level
Setting of TOBn2 pin output
level before count operation
0: Low level
1: High level
0: Disable TOBn3 pin output
1: Enable TOBn3 pin output
0: Disable TOBn2 pin output
1: Enable TOBn2 pin output
Setting of TOBn3 pin output
level before count operation
0: Low level
1: High level
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