UPD70F3451GC-UBT-A Renesas Electronics America, UPD70F3451GC-UBT-A Datasheet - Page 523

• Manufacturer Part Number: UPD70F3451GC-UBT-A
• Description: MCU 32BIT 128KB FLASH 80LQFP
• Manufacturer: Renesas Electronics America
• Series: V850E/Ix3r

Specifications of UPD70F3451GC-UBT-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: CSI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 44
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Data Converters: A/D 10x12b, 4x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

TTmZCL Bit
(b) Clearing method <2>: By detecting clear level condition of the TENCm0, TENCm1, and TECRm pins
0
0
0
0
1
1
1
1
(TTmSCE bit = 1)
When the TTmSCE bit = 1, the 16-bit counter is cleared to 0000H if the clear level condition of the
TECRm, TENCm0, or TENCm1 pin specified by the TTmZCL, TTmBCL, and TTmACL bits is detected. At
this time, the encoder clear interrupt request signal (INTTIECm) is not generated. Setting of the TTmECS1
and TTmECS0 bits is invalid when the TTmSCE bit = 1.
Caution The 16-bit counter is cleared to 0000H when the clear level condition of the TTmZCL,
Remark
Clear Level Condition Setting
TTmBCL, and TTmACL bits match the input level of the TECRm, TENCm1, or TENCm0 pin.
V850E/IF3: m = 1
V850E/IG3: m = 0, 1
Table 8-12. 16-bit Counter Clearing Condition When TTmSCE Bit = 1
TTmBCL Bit
0
0
1
1
0
0
1
1
CHAPTER 8 16-BIT TIMER/EVENT COUNTER T (TMT)
TTmACL Bit
User’s Manual U18279EJ3V0UD
0
1
0
1
0
1
0
1
TECRm Pin
H
H
H
H
L
L
L
L
Input Level of Encoder Pin
TENCm1 Pin
H
H
H
H
L
L
L
L
TENCm0 Pin
H
H
H
H
L
L
L
L
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