UPD70F3451GC-UBT-A Renesas Electronics America, UPD70F3451GC-UBT-A Datasheet - Page 555

• Manufacturer Part Number: UPD70F3451GC-UBT-A
• Description: MCU 32BIT 128KB FLASH 80LQFP
• Manufacturer: Renesas Electronics America
• Series: V850E/Ix3r

Specifications of UPD70F3451GC-UBT-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: CSI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 44
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Data Converters: A/D 10x12b, 4x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

(5) TABn I/O control register 3 (TABnIOC3)
The TABnIOC3 register is an 8-bit register that controls the output of the timer Qn option function.
To output from the TOBnTm pin, set the TABnIOC0.TABnOEm bit to 1 and then set the TABnIOC3 register.
The TABnIOC3 register can be rewritten only when the TABnCTL0.TABnCE bit is 0.
Rewriting each bit of the TABnIOC3 register is prohibited when the TABnCTL0.TABnCE bit is 1; however the
same value can be rewritten to each bit of the TABnIOC3 register when the TABnCTL0.TABnCE bit is 1.
This register can be read or written in 8-bit or 1-bit units.
Reset sets this register to A8H.
Caution Set the TABnIOC3 register to the default value (A8H) when the timer is used in a mode other
Remark
m = 1 to 3
TABnIOC3
n = 0, 1
than the 6-phase PWM output mode.
Set the output level of the TOBnTm pin by the TABnIOC0 register.
After reset: A8H
TABnOLB3
TABnOEBm
TABnOLBm
<7>
0
1
0
1
CHAPTER 10 MOTOR CONTROL FUNCTION
TABnOEB3 TABnOLB2 TABnOEB2 TABnOLB1TABnOEB1
Disable inversion of output of TOBnBm pin
Enable inversion of output of TOBnBm pin
Disable TOBnBm pin output.
Enable TOBnBm pin output.
•
•
R/W
<6>
When TABnOLBm bit = 0, low level is output from TOBnBm pin.
When TABnOLBm bit = 1, high level is output from TOBnBm pin.
User’s Manual U18279EJ3V0UD
Address: TAB0IOC3 FFFFF602H, TAB1IOC3 FFFFF642H
<5>
Setting of TOBnBm pin output level
Setting of TOBnBm pin output
<4>
<3>
<2>
1
0
0
0
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