UPD70F3451GC-UBT-A Renesas Electronics America, UPD70F3451GC-UBT-A Datasheet - Page 514

• Manufacturer Part Number: UPD70F3451GC-UBT-A
• Description: MCU 32BIT 128KB FLASH 80LQFP
• Manufacturer: Renesas Electronics America
• Series: V850E/Ix3r

Specifications of UPD70F3451GC-UBT-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: CSI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 44
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Data Converters: A/D 10x12b, 4x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

512
Encoder compare
mode
(5) Controlling bits of TTmCTL2 register
The setting of the TTmCTL2 register in the encoder compare mode is shown below.
Mode
Note The counter can operate in a range from 0000H to the set value of the TTmCCR0 register.
Remark
(a) Outline of each bit
<1> The TTmUDS1 and TTmUDS0 bits identify the counting direction (up or down) of the 16-bit counter
<2> The TTmECM1 and TTmECM0 bits control clearing of the 16-bit counter when its count value
<3> The TTmLDE bit controls a function to transfer the set value of the TTmCCR0 register to the 16-bit
by the phase input from the encoder input pin (TENCm0 or TENCm1).
matches the value of the CCR0 or CCR1 buffer register.
counter when the counter underflows. The TTmLDE bit is valid only when the TTmECM1 and
TTmECM0 bits are 00 or 01. It is invalid when these bits are set to any other value.
V850E/IF3: m = 1
V850E/IG3: m = 0, 1
Can be set to 00,
TTmUDS0 Bits
01, 10, or 11.
TTmUDS1,
(<1>)
CHAPTER 8 16-BIT TIMER/EVENT COUNTER T (TMT)
Table 8-10. Setting of TTmCTL2 Register
TTmECM1 Bit
(<2>)
0
1
User’s Manual U18279EJ3V0UD
TTmECM0 Bit
(<2>)
0
1
0
1
TTmLDE Bit
Invalid
Invalid
(<3>)
0
1
0
1
(Target Compare
Counter Clear
TTmCCR0,
TTmCCR0
TTmCCR1
TTmCCR1
Register)
−
Possible
Transfer to
Possible
Counter
−
−
−
−
Note