UPD70F3451GC-UBT-A Renesas Electronics America, UPD70F3451GC-UBT-A Datasheet - Page 554

• Manufacturer Part Number: UPD70F3451GC-UBT-A
• Description: MCU 32BIT 128KB FLASH 80LQFP
• Manufacturer: Renesas Electronics America
• Series: V850E/Ix3r

Specifications of UPD70F3451GC-UBT-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: CSI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 44
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Data Converters: A/D 10x12b, 4x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

552
(4) TABn option register 3 (TABnOPT3)
Note For the setting of the TABnAT7 to TABnAT4 bits, see CHAPTER 12 A/D CONVERTERS 0 AND 1.
The TABnOPT3 register is an 8-bit register that controls the timer Qn option function.
This register can be rewritten when the TABnCTL0.TABnCE bit is 1.
This register can be read or written in 8-bit or 1-bit units.
Reset sets this register to 00H.
TABnOPT3
(n = 0, 1)
After reset: 00H
TABnAT7
TABnAT6
TABnAT5
TABnAT4
TABnATM7
TABnATM6
0
1
0
1
0
1
0
1
7
0
1
0
1
0
Note
Note
Note
Note
CHAPTER 10 MOTOR CONTROL FUNCTION
Output A/D trigger signal (TABTADTn1) of INTTAnCC1 interrupt while
dead-time counter is counting up.
Output A/D trigger signal (TABTADTn1) of INTTAnCC1 interrupt while
dead-time counter is counting down.
Output A/D trigger signal (TABTADTn1) of INTTAnCC0 interrupt while
dead-time counter is counting up.
Output A/D trigger signal (TABTADTn1) of INTTAnCC0 interrupt while
dead-time counter is counting down.
Disable output of A/D trigger signal (TABTADTn1) for INTTAnCC1 interrupt.
Enable output of A/D trigger signal (TABTADTn1) for INTTAnCC1 interrupt.
Disable output of A/D trigger signal (TABTADTn1) for INTTAnCC0 interrupt.
Enable output of A/D trigger signal (TABTADTn1) for INTTAnCC0 interrupt.
Disable output of A/D trigger signal (TABTADTn1) for INTTBnCC0 interrupt
(crest interrupt).
Enable output of A/D trigger signal (TABTADTn1) for INTTBnCC0 interrupt
(crest interrupt).
Disable output of A/D trigger signal (TABTADTn1) for INTTBnOV interrupt
(valley interrupt).
Enable output of A/D trigger signal (TABTADTn1) for INTTBnOV interrupt
(valley interrupt).
R/W
6
0
TABnATM7 TABnATM6 TABnAT7 TABnAT6 TABnAT5 TABnAT4
User’s Manual U18279EJ3V0UD
Address: TAB0OPT3 FFFFF603H, TAB1OPT3 FFFFF643H
<5>
TABnATM7
TABnATM6
A/D
A/D
A/D
A/D
<4>
trigger output control 3
trigger output control 2
trigger output control 1
trigger output control 0
<3>
mode selection
mode selection
<2>
<1>
<0>